[llvm] r210201 - Two small enhancements for the JIT.

[Yaron Keren]

Author: yrnkrn
Date: Wed Jun  4 12:35:28 2014
New Revision: 210201

URL: http://llvm.org/viewvc/llvm-project?rev=210201&view=rev
Log:
Two small enhancements for the JIT.

When JITting a large project such as Boost it's quite hard to figure out the problematic inline asm without debug location. This patch provides debug location printout before the JIT aborts due to inline asm. printDebugLoc() was exposed from MachineInstr.cpp and reused here.

If the JIT run with debug info, don't bomb on DBG_VALUE but ignore them.

http://reviews.llvm.org/D3416


Modified:
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=210201&r1=210200&r2=210201&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Wed Jun  4 12:35:28 2014
@@ -1113,9 +1113,14 @@ void Emitter<CodeEmitter>::emitInstructi
     case TargetOpcode::INLINEASM:
       // We allow inline assembler nodes with empty bodies - they can
       // implicitly define registers, which is ok for JIT.
-      if (MI.getOperand(0).getSymbolName()[0])
+      if (MI.getOperand(0).getSymbolName()[0]) {
+        DebugLoc DL = MI.getDebugLoc();
+        DL.print(MI.getParent()->getParent()->getFunction()->getContext(),
+                 llvm::errs());
         report_fatal_error("JIT does not support inline asm!");
+      }
       break;
+    case TargetOpcode::DBG_VALUE:
     case TargetOpcode::CFI_INSTRUCTION:
       break;
     case TargetOpcode::GC_LABEL: