[llvm] r210067 - [AArch64] Correctly deal with VPR stack parameter passing.
Jiangning Liu
jiangning.liu at arm.com
Mon Jun 2 20:25:10 PDT 2014
Author: jiangning
Date: Mon Jun 2 22:25:09 2014
New Revision: 210067
URL: http://llvm.org/viewvc/llvm-project?rev=210067&view=rev
Log:
[AArch64] Correctly deal with VPR stack parameter passing.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/test/CodeGen/AArch64/arm64-aapcs.ll
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=210067&r1=210066&r2=210067&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Jun 2 22:25:09 2014
@@ -1711,7 +1711,9 @@ SDValue AArch64TargetLowering::LowerForm
InVals.push_back(FrameIdxN);
continue;
- } if (VA.isRegLoc()) {
+ }
+
+ if (VA.isRegLoc()) {
// Arguments stored in registers.
EVT RegVT = VA.getLocVT();
@@ -1772,25 +1774,30 @@ SDValue AArch64TargetLowering::LowerForm
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
SDValue ArgValue;
+ // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
ISD::LoadExtType ExtType = ISD::NON_EXTLOAD;
+ MVT MemVT = VA.getValVT();
+
switch (VA.getLocInfo()) {
default:
break;
case CCValAssign::SExt:
ExtType = ISD::SEXTLOAD;
+ MemVT = VA.getLocVT();
break;
case CCValAssign::ZExt:
ExtType = ISD::ZEXTLOAD;
+ MemVT = VA.getLocVT();
break;
case CCValAssign::AExt:
ExtType = ISD::EXTLOAD;
+ MemVT = VA.getLocVT();
break;
}
ArgValue = DAG.getExtLoad(ExtType, DL, VA.getValVT(), Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
- VA.getLocVT(),
- false, false, false, 0);
+ MemVT, false, false, false, 0);
InVals.push_back(ArgValue);
}
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-aapcs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-aapcs.ll?rev=210067&r1=210066&r2=210067&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-aapcs.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-aapcs.ll Mon Jun 2 22:25:09 2014
@@ -101,3 +101,11 @@ define fp128 @test_fp128([8 x float] %ar
; CHECK: ldr {{q[0-9]+}}, [sp]
ret fp128 %arg1
}
+
+; Check if VPR can be correctly pass by stack.
+define <2 x double> @test_vreg_stack([8 x <2 x double>], <2 x double> %varg_stack) {
+entry:
+; CHECK-LABEL: test_vreg_stack:
+; CHECK: ldr {{q[0-9]+}}, [sp]
+ ret <2 x double> %varg_stack;
+}
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