[llvm] r210032 - [X86] Fix checked arithmetic for i8 on X86.

[Andrea Di Biagio]

Author: adibiagio
Date: Mon Jun  2 11:00:27 2014
New Revision: 210032

URL: http://llvm.org/viewvc/llvm-project?rev=210032&view=rev
Log:
[X86] Fix checked arithmetic for i8 on X86.

When lowering a ISD::BRCOND into a test+branch, make sure that we
always use the correct condition code to emit the test operation.

This fixes PR19858: "i8 checked mul is wrong on x86".

Patch by Keno Fisher!


Added:
    llvm/trunk/test/CodeGen/X86/i8-umulo.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=210032&r1=210031&r2=210032&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun  2 11:00:27 2014
@@ -11482,8 +11482,9 @@ SDValue X86TargetLowering::LowerBRCOND(S
   }
 
   if (addTest) {
-    CC = DAG.getConstant(X86::COND_NE, MVT::i8);
-    Cond = EmitTest(Cond, X86::COND_NE, dl, DAG);
+    X86::CondCode X86Cond = Inverted ? X86::COND_E : X86::COND_NE;
+    CC = DAG.getConstant(X86Cond, MVT::i8);
+    Cond = EmitTest(Cond, X86Cond, dl, DAG);
   }
   Cond = ConvertCmpIfNecessary(Cond, DAG);
   return DAG.getNode(X86ISD::BRCOND, dl, Op.getValueType(),

Added: llvm/trunk/test/CodeGen/X86/i8-umulo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i8-umulo.ll?rev=210032&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i8-umulo.ll (added)
+++ llvm/trunk/test/CodeGen/X86/i8-umulo.ll Mon Jun  2 11:00:27 2014
@@ -0,0 +1,24 @@
+; RUN: llc -mcpu=generic -march=x86 < %s | FileCheck %s
+; PR19858
+
+declare {i8, i1} @llvm.umul.with.overflow.i8(i8 %a, i8 %b)
+define i8 @testumulo(i32 %argc) {
+; CHECK: imulw
+; CHECK: testb %{{.+}}, %{{.+}}
+; CHECK: je [[NOOVERFLOWLABEL:.+]]
+; CHECK: {{.*}}[[NOOVERFLOWLABEL]]:
+; CHECK-NEXT: movb
+; CHECK-NEXT: retl
+top:
+  %RHS = trunc i32 %argc to i8
+  %umul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 25, i8 %RHS)
+  %ex = extractvalue { i8, i1 } %umul, 1
+  br i1 %ex, label %overflow, label %nooverlow
+
+overflow:
+  ret i8 %RHS
+
+nooverlow:
+  %umul.value = extractvalue { i8, i1 } %umul, 0
+  ret i8 %umul.value
+}