[PATCH] Convert a vselect into a concat_vector if possible

[Filipe Cabecinhas]

Thanks, I didn't remember check-dag. Btw, if we use check-dag, we wouldn't
need the %xmm{{[01]}} regex either! unless I'm looking at it wrong.

I'll commit later today.

Thank you,

Filipe

On Friday, May 30, 2014, hfinkel at anl.gov <hfinkel at anl.gov> wrote:

> Aside from fixing up the test, this LGTM.
>
> ================
> Comment at: test/CodeGen/X86/vselect.ll:269
> @@ +268,3 @@
> +; CHECK: movlhps %xmm{{[23]}}, %xmm{{[01]}}
> +; CHECK: movlhps %xmm{{[23]}}, %xmm{{[01]}}
> +; CHECK: addps %xmm{{[01]}}, %xmm{{[01]}}
> ----------------
> I think can be made a little more specific. You know what the input
> registers are (because they're dictated by the calling convention), so you
> can do something like this:
>
>   ; CHECK-DAG: movlhps %xmm2, %xmm{{[01]}}
>   ; CHECK-DAG: movlhps %xmm3, %xmm{{[01]}}
>
> (where the CHECK-DAGs can match in either order). Because the add is
> commutative, it is hard to pattern match the resulting registers in a
> stable way (because they could be flipped). If you make the test use a
> subtract (so that the correct order is fixed), then we can be even more
> specific:
>
>   ; CHECK-DAG: movlhps %xmm2, %[[REG1:[xmm[01]]]]
>   ; CHECK-DAG: movlhps %xmm3, %[[REG2:[xmm[01]]]]
>   ; CHECK-NEXT: subps [[REG1]], [[REG2]]
> (or something like that).
>
> http://reviews.llvm.org/D3916
>
>
>
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