[llvm] r209746 - InstCombine: Improvement to check if signed addition overflows.
Evgeniy Stepanov
eugeni.stepanov at gmail.com
Thu May 29 06:57:53 PDT 2014
mkdir build0; cd build0
cmake -GNinja -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=ON
.. && ninja clang
cd ..
mkdir build1; cd build1
cmake -GNinja -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=ON
-DLLVM_ENABLE_WERROR=ON -DCMAKE_C_COMPILER=$HOME/llvm/build0/bin/clang
-DCMAKE_CXX_COMPILER=$HOME/llvm/build0/bin/clang++ .. && ninja clang
./bin/clang++ -c -std=c++11 ~/1.ii
-cc1 line:
"/home/dtoolsbot/llvm/build1/bin/clang-3.5" -cc1 -triple
x86_64-unknown-linux-gnu -emit-obj -mrelax-all -disable-free
-main-file-name 1.ii -mrelocation-model static -mdisable-fp-elim
-fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables
-fuse-init-array -target-cpu x86-64 -v -coverage-file
/home/dtoolsbot/llvm/build1/1.o -resource-dir
/home/dtoolsbot/llvm/build1/bin/../lib/clang/3.5.0 -std=c++11
-fdeprecated-macro -fdebug-compilation-dir /home/dtoolsbot/llvm/build1
-ferror-limit 19 -fmessage-length 101 -mstackrealign
-fobjc-runtime=gcc -fcxx-exceptions -fexceptions
-fdiagnostics-show-option -o 1.o -x c++-cpp-output
/home/dtoolsbot/1.ii
On Thu, May 29, 2014 at 4:43 PM, Evgeniy Stepanov
<eugeni.stepanov at gmail.com> wrote:
> Hi,
>
> this is crashing the second stage of sanitizer bootstrap:
> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/10033/steps/bootstrap%20clang/logs/stdio
>
> llvm::EVT llvm::SDNode::getValueType(unsigned int) const: Assertion
> `ResNo < NumValues && "Illegal result number!"' failed.
>
> This could be a bug in the optimization this change adds, or some
> undefined behaviour elsewhere in LLVM that this change triggers.
>
> I've attached an unminimized test case.
> Reproducible on Ubuntu 14.04 by building a second stage compiler and running
> $ bin/clang++ -c -std=c++11 1.ii
>
>
>
> On Wed, May 28, 2014 at 7:30 PM, Rafael Espindola
> <rafael.espindola at gmail.com> wrote:
>> Author: rafael
>> Date: Wed May 28 10:30:40 2014
>> New Revision: 209746
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=209746&view=rev
>> Log:
>> InstCombine: Improvement to check if signed addition overflows.
>>
>> This patch implements two things:
>>
>> 1. If we know one number is positive and another is negative, we return true as
>> signed addition of two opposite signed numbers will never overflow.
>>
>> 2. Implemented TODO : If one of the operands only has one non-zero bit, and if
>> the other operand has a known-zero bit in a more significant place than it
>> (not including the sign bit) the ripple may go up to and fill the zero, but
>> won't change the sign. e.x - (x & ~4) + 1
>>
>> We make sure that we are ignoring 0 at MSB.
>>
>> Patch by Suyog Sarda.
>>
>> Added:
>> llvm/trunk/test/Transforms/InstCombine/AddOverflow.ll
>> Modified:
>> llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
>>
>> Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp?rev=209746&r1=209745&r2=209746&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp (original)
>> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAddSub.cpp Wed May 28 10:30:40 2014
>> @@ -889,11 +889,34 @@ static inline Value *dyn_castFoldableMul
>> return nullptr;
>> }
>>
>> +// If one of the operands only has one non-zero bit, and if the other
>> +// operand has a known-zero bit in a more significant place than it (not
>> +// including the sign bit) the ripple may go up to and fill the zero, but
>> +// won't change the sign. For example, (X & ~4) + 1.
>> +// FIXME: Handle case where LHS has a zero before the 1 in the RHS, but also
>> +// has one after.
>> +static bool CheckRippleForAdd(APInt Op0KnownZero, APInt Op0KnownOne,
>> + APInt Op1KnownZero, APInt Op1KnownOne) {
>> + // Make sure that one of the operand has only one bit set to 1 and all other
>> + // bit set to 0.
>> + if ((~Op1KnownZero).countPopulation() == 1) {
>> + int BitWidth = Op0KnownZero.getBitWidth();
>> + // Ignore Sign Bit.
>> + Op0KnownZero.clearBit(BitWidth - 1);
>> + int Op1OnePosition = BitWidth - Op1KnownOne.countLeadingZeros() - 1;
>> + int Op0ZeroPosition = BitWidth - Op0KnownZero.countLeadingZeros() - 1;
>> + if ((Op0ZeroPosition != (BitWidth - 1)) &&
>> + (Op0ZeroPosition >= Op1OnePosition))
>> + return true;
>> + }
>> + return false;
>> +}
>>
>> /// WillNotOverflowSignedAdd - Return true if we can prove that:
>> /// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS))
>> /// This basically requires proving that the add in the original type would not
>> /// overflow to change the sign bit or have a carry out.
>> +/// TODO: Handle this for Vectors.
>> bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) {
>> // There are different heuristics we can use for this. Here are some simple
>> // ones.
>> @@ -905,14 +928,29 @@ bool InstCombiner::WillNotOverflowSigned
>> if (ComputeNumSignBits(LHS) > 1 && ComputeNumSignBits(RHS) > 1)
>> return true;
>>
>> + if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) {
>>
>> - // If one of the operands only has one non-zero bit, and if the other operand
>> - // has a known-zero bit in a more significant place than it (not including the
>> - // sign bit) the ripple may go up to and fill the zero, but won't change the
>> - // sign. For example, (X & ~4) + 1.
>> -
>> - // TODO: Implement.
>> -
>> + int BitWidth = IT->getBitWidth();
>> + APInt LHSKnownZero(BitWidth, 0, /*isSigned*/ true);
>> + APInt LHSKnownOne(BitWidth, 0, /*isSigned*/ true);
>> + computeKnownBits(LHS, LHSKnownZero, LHSKnownOne);
>> +
>> + APInt RHSKnownZero(BitWidth, 0, /*isSigned*/ true);
>> + APInt RHSKnownOne(BitWidth, 0, /*isSigned*/ true);
>> + computeKnownBits(RHS, RHSKnownZero, RHSKnownOne);
>> +
>> + // Addition of two 2's compliment numbers having opposite signs will never
>> + // overflow.
>> + if ((LHSKnownOne[BitWidth - 1] && RHSKnownZero[BitWidth - 1]) ||
>> + (LHSKnownZero[BitWidth - 1] && RHSKnownOne[BitWidth - 1]))
>> + return true;
>> +
>> + // Check if carry bit of addition will not cause overflow.
>> + if (CheckRippleForAdd(LHSKnownZero, LHSKnownOne, RHSKnownZero, RHSKnownOne))
>> + return true;
>> + if (CheckRippleForAdd(RHSKnownZero, RHSKnownOne, LHSKnownZero, LHSKnownOne))
>> + return true;
>> + }
>> return false;
>> }
>>
>>
>> Added: llvm/trunk/test/Transforms/InstCombine/AddOverflow.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/AddOverflow.ll?rev=209746&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/Transforms/InstCombine/AddOverflow.ll (added)
>> +++ llvm/trunk/test/Transforms/InstCombine/AddOverflow.ll Wed May 28 10:30:40 2014
>> @@ -0,0 +1,56 @@
>> +; RUN: opt < %s -instcombine -S | FileCheck %s
>> +
>> +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
>> +target triple = "x86_64-unknown-linux-gnu"
>> +
>> +; CHECK-LABEL: @ripple(
>> +; CHECK: add nsw i16 %tmp1, 1
>> +define i32 @ripple(i16 signext %x) {
>> +bb:
>> + %tmp = sext i16 %x to i32
>> + %tmp1 = and i32 %tmp, -5
>> + %tmp2 = trunc i32 %tmp1 to i16
>> + %tmp3 = sext i16 %tmp2 to i32
>> + %tmp4 = add i32 %tmp3, 1
>> + ret i32 %tmp4
>> +}
>> +
>> +; CHECK-LABEL: @ripplenot(
>> +; CHECK: add i32 %tmp3, 4
>> +define i32 @ripplenot(i16 signext %x) {
>> +bb:
>> + %tmp = sext i16 %x to i32
>> + %tmp1 = and i32 %tmp, -3
>> + %tmp2 = trunc i32 %tmp1 to i16
>> + %tmp3 = sext i16 %tmp2 to i32
>> + %tmp4 = add i32 %tmp3, 4
>> + ret i32 %tmp4
>> +}
>> +
>> +; CHECK-LABEL: @oppositesign(
>> +; CHECK: add nsw i16 %tmp1, 4
>> +define i32 @oppositesign(i16 signext %x) {
>> +bb:
>> + %tmp = sext i16 %x to i32
>> + %tmp1 = or i32 %tmp, 32768
>> + %tmp2 = trunc i32 %tmp1 to i16
>> + %tmp3 = sext i16 %tmp2 to i32
>> + %tmp4 = add i32 %tmp3, 4
>> + ret i32 %tmp4
>> +}
>> +
>> +; CHECK-LABEL: @ripplenot_var(
>> +; CHECK: add i32 %tmp6, %tmp7
>> +define i32 @ripplenot_var(i16 signext %x, i16 signext %y) {
>> +bb:
>> + %tmp = sext i16 %x to i32
>> + %tmp1 = and i32 %tmp, -5
>> + %tmp2 = trunc i32 %tmp1 to i16
>> + %tmp3 = sext i16 %y to i32
>> + %tmp4 = or i32 %tmp3, 2
>> + %tmp5 = trunc i32 %tmp4 to i16
>> + %tmp6 = sext i16 %tmp5 to i32
>> + %tmp7 = sext i16 %tmp2 to i32
>> + %tmp8 = add i32 %tmp6, %tmp7
>> + ret i32 %tmp8
>> +}
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list