[polly] r209753 - Added option for n-dimensional rectangular tiling
Johannes Doerfert
jdoerfert at codeaurora.org
Wed May 28 10:21:02 PDT 2014
Author: jdoerfert
Date: Wed May 28 12:21:02 2014
New Revision: 209753
URL: http://llvm.org/viewvc/llvm-project?rev=209753&view=rev
Log:
Added option for n-dimensional rectangular tiling
+ CL-option --polly-tile-sizes=<int,...,int>
The i'th value is used as a tile size for dimension i, if
there is no i'th value, the value of --polly-default-tile-size is
used
+ CL-option --polly-default-tile-size=int
Used if no tile size is given for a dimension i
+ 3 Simple testcases
Added:
polly/trunk/test/ScheduleOptimizer/line-tiling-2.ll
polly/trunk/test/ScheduleOptimizer/line-tiling.ll
polly/trunk/test/ScheduleOptimizer/rectangular-tiling.ll
Modified:
polly/trunk/lib/Transform/ScheduleOptimizer.cpp
Modified: polly/trunk/lib/Transform/ScheduleOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/lib/Transform/ScheduleOptimizer.cpp?rev=209753&r1=209752&r2=209753&view=diff
==============================================================================
--- polly/trunk/lib/Transform/ScheduleOptimizer.cpp (original)
+++ polly/trunk/lib/Transform/ScheduleOptimizer.cpp Wed May 28 12:21:02 2014
@@ -78,6 +78,19 @@ MaximizeBandDepth("polly-opt-maximize-ba
cl::desc("Maximize the band depth (yes/no)"), cl::Hidden,
cl::init("yes"), cl::ZeroOrMore, cl::cat(PollyCategory));
+static cl::opt<int>
+DefaultTileSize("polly-default-tile-size",
+ cl::desc("The default tile size (if not enough were provided by"
+ " --polly-tile-sizes)"),
+ cl::Hidden, cl::init(32), cl::ZeroOrMore,
+ cl::cat(PollyCategory));
+
+static cl::list<int> TileSizes("polly-tile-sizes",
+ cl::desc("A tile size"
+ " for each loop dimension, filled with"
+ " --polly-default-tile-size"),
+ cl::Hidden, cl::ZeroOrMore, cl::CommaSeparated,
+ cl::cat(PollyCategory));
namespace {
class IslScheduleOptimizer : public ScopPass {
@@ -103,11 +116,11 @@ private:
/// tiling.
///
/// Example:
- /// scheduleDimensions = 2, parameterDimensions = 1, tileSize = 32
+ /// scheduleDimensions = 2, parameterDimensions = 1, TileSizes = <32, 64>
///
/// tileMap := [p0] -> {[s0, s1] -> [t0, t1, s0, s1]:
/// t0 % 32 = 0 and t0 <= s0 < t0 + 32 and
- /// t1 % 32 = 0 and t1 <= s1 < t1 + 32}
+ /// t1 % 64 = 0 and t1 <= s1 < t1 + 64}
///
/// Before tiling:
///
@@ -118,13 +131,13 @@ private:
/// After tiling:
///
/// for (t_i = 0; t_i < N; i+=32)
- /// for (t_j = 0; t_j < M; j+=32)
+ /// for (t_j = 0; t_j < M; j+=64)
/// for (i = t_i; i < min(t_i + 32, N); i++) | Unknown that N % 32 = 0
- /// for (j = t_j; j < t_j + 32; j++) | Known that M % 32 = 0
+ /// for (j = t_j; j < t_j + 64; j++) | Known that M % 64 = 0
/// S(i,j)
///
static isl_basic_map *getTileMap(isl_ctx *ctx, int scheduleDimensions,
- isl_space *SpaceModel, int tileSize = 32);
+ isl_space *SpaceModel);
/// @brief Get the schedule for this band.
///
@@ -219,13 +232,12 @@ void IslScheduleOptimizer::extendScatter
isl_basic_map *IslScheduleOptimizer::getTileMap(isl_ctx *ctx,
int scheduleDimensions,
- isl_space *SpaceModel,
- int tileSize) {
+ isl_space *SpaceModel) {
// We construct
//
// tileMap := [p0] -> {[s0, s1] -> [t0, t1, p0, p1, a0, a1]:
- // s0 = a0 * 32 and s0 = p0 and t0 <= p0 < t0 + 32 and
- // s1 = a1 * 32 and s1 = p1 and t1 <= p1 < t1 + 32}
+ // s0 = a0 * 32 and s0 = p0 and t0 <= p0 < t0 + 64 and
+ // s1 = a1 * 64 and s1 = p1 and t1 <= p1 < t1 + 64}
//
// and project out the auxilary dimensions a0 and a1.
isl_space *Space =
@@ -239,6 +251,8 @@ isl_basic_map *IslScheduleOptimizer::get
int tX = x;
int pX = scheduleDimensions + x;
int aX = 2 * scheduleDimensions + x;
+ int tileSize = (int)TileSizes.size() > x ? TileSizes[x] : DefaultTileSize;
+ assert(tileSize > 0 && "Invalid tile size");
isl_constraint *c;
Added: polly/trunk/test/ScheduleOptimizer/line-tiling-2.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScheduleOptimizer/line-tiling-2.ll?rev=209753&view=auto
==============================================================================
--- polly/trunk/test/ScheduleOptimizer/line-tiling-2.ll (added)
+++ polly/trunk/test/ScheduleOptimizer/line-tiling-2.ll Wed May 28 12:21:02 2014
@@ -0,0 +1,37 @@
+; RUN: opt %loadPolly -polly-opt-isl -analyze -polly-no-tiling=0 -polly-ast -polly-tile-sizes=1,64 %s
+; CHECK: c0 += 1
+; CHECK: c1 += 64
+; CHECK: c1 <= c1 + 63
+; ModuleID = 'line-tiling-2.ll'
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
+
+; Function Attrs: nounwind
+define void @line([512 x i32]* %A) {
+entry:
+ br label %entry.split
+
+entry.split: ; preds = %entry
+ br label %for.body3.lr.ph
+
+for.body3.lr.ph: ; preds = %for.inc5, %entry.split
+ %i.0 = phi i32 [ 0, %entry.split ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.lr.ph, %for.body3
+ %j.0 = phi i32 [ 0, %for.body3.lr.ph ], [ %inc, %for.body3 ]
+ %mul = mul nsw i32 %j.0, %i.0
+ %rem = srem i32 %mul, 42
+ %arrayidx4 = getelementptr inbounds [512 x i32]* %A, i32 %i.0, i32 %j.0
+ store i32 %rem, i32* %arrayidx4, align 4
+ %inc = add nsw i32 %j.0, 1
+ %cmp2 = icmp slt i32 %inc, 512
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i32 %i.0, 1
+ %cmp = icmp slt i32 %inc6, 1024
+ br i1 %cmp, label %for.body3.lr.ph, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
Added: polly/trunk/test/ScheduleOptimizer/line-tiling.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScheduleOptimizer/line-tiling.ll?rev=209753&view=auto
==============================================================================
--- polly/trunk/test/ScheduleOptimizer/line-tiling.ll (added)
+++ polly/trunk/test/ScheduleOptimizer/line-tiling.ll Wed May 28 12:21:02 2014
@@ -0,0 +1,37 @@
+; RUN: opt %loadPolly -polly-opt-isl -analyze -polly-no-tiling=0 -polly-ast -polly-tile-sizes=64,1 %s
+; CHECK: c0 += 64
+; CHECK: c1 += 1
+; CHECK: c0 <= c0 + 63
+; ModuleID = 'line-tiling.ll'
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
+
+; Function Attrs: nounwind
+define void @line([512 x i32]* %A) {
+entry:
+ br label %entry.split
+
+entry.split: ; preds = %entry
+ br label %for.body3.lr.ph
+
+for.body3.lr.ph: ; preds = %for.inc5, %entry.split
+ %i.0 = phi i32 [ 0, %entry.split ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.lr.ph, %for.body3
+ %j.0 = phi i32 [ 0, %for.body3.lr.ph ], [ %inc, %for.body3 ]
+ %mul = mul nsw i32 %j.0, %i.0
+ %rem = srem i32 %mul, 42
+ %arrayidx4 = getelementptr inbounds [512 x i32]* %A, i32 %i.0, i32 %j.0
+ store i32 %rem, i32* %arrayidx4, align 4
+ %inc = add nsw i32 %j.0, 1
+ %cmp2 = icmp slt i32 %inc, 512
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i32 %i.0, 1
+ %cmp = icmp slt i32 %inc6, 1024
+ br i1 %cmp, label %for.body3.lr.ph, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
Added: polly/trunk/test/ScheduleOptimizer/rectangular-tiling.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScheduleOptimizer/rectangular-tiling.ll?rev=209753&view=auto
==============================================================================
--- polly/trunk/test/ScheduleOptimizer/rectangular-tiling.ll (added)
+++ polly/trunk/test/ScheduleOptimizer/rectangular-tiling.ll Wed May 28 12:21:02 2014
@@ -0,0 +1,38 @@
+; RUN: opt %loadPolly -polly-opt-isl -analyze -polly-no-tiling=0 -polly-ast -polly-tile-sizes=256,16 %s
+; CHECK: c0 += 256
+; CHECK: c1 += 16
+; CHECK: c0 <= c0 + 255
+; CHECK: c1 <= c1 + 15
+; ModuleID = 'rectangular-tiling.ll'
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
+
+; Function Attrs: nounwind
+define void @rect([512 x i32]* %A) {
+entry:
+ br label %entry.split
+
+entry.split: ; preds = %entry
+ br label %for.body3.lr.ph
+
+for.body3.lr.ph: ; preds = %for.inc5, %entry.split
+ %i.0 = phi i32 [ 0, %entry.split ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.lr.ph, %for.body3
+ %j.0 = phi i32 [ 0, %for.body3.lr.ph ], [ %inc, %for.body3 ]
+ %mul = mul nsw i32 %j.0, %i.0
+ %rem = srem i32 %mul, 42
+ %arrayidx4 = getelementptr inbounds [512 x i32]* %A, i32 %i.0, i32 %j.0
+ store i32 %rem, i32* %arrayidx4, align 4
+ %inc = add nsw i32 %j.0, 1
+ %cmp2 = icmp slt i32 %inc, 512
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i32 %i.0, 1
+ %cmp = icmp slt i32 %inc6, 1024
+ br i1 %cmp, label %for.body3.lr.ph, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
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