[PATCH][ARM64] Fix cycle in DAG after performPostLD1Combine

[Adam Nemet]

I think this is pretty obvious but want to make sure the original author is fine with this.

Povray and dealII currently assert with "Overran sorted position" in
AssignTopologicalOrder.  The problem is that performPostLD1Combine can
introduce cycles.

Consider:

(insert_vector_elt (INSERT_SUBREG undef,
                                  (load (add %vreg0, Constant<8>), undef),  <= A
                                  TargetConstant<2>),
                   (load %vreg0, undef),                                    <= B
                   Constant<1>)

This is turned into a LD1LANEpost node.  However the address in A is not a
valid user of the post-incremented address of B in LD1LANEpost.

It’s also strange that the cycle detection in AssignTopologicalOrder didn’t catch this.  I will see why.

Fixes povray and dealII.

OK to commit?

Adam

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