[llvm] r209123 - SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.

Alexander Potapenko glider at google.com
Tue May 20 01:47:38 PDT 2014


Here it is.

$ clang    -m64   -O2 -c pack.ii -w
clang-3.5: /usr/local/google/home/dtoolsbot/llvm-buildbot/slave/linux-chrome-tsan/build/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3066:
llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc,
llvm::EVT, llvm::SDValue, llvm::SDValue): Assertion `(!VT.isVector()
|| VT == N2.getValueType()) && "Vector shift amounts must be in the
same as their first arg"' failed.
0  clang-3.5       0x000000000113cb92 llvm::sys::PrintStackTrace(_IO_FILE*) + 34
1  clang-3.5       0x000000000113c7b4
2  libpthread.so.0 0x00007fb10bbeecb0
3  libc.so.6       0x00007fb10ae29425 gsignal + 53
4  libc.so.6       0x00007fb10ae2cb8b abort + 379
5  libc.so.6       0x00007fb10ae220ee
6  libc.so.6       0x00007fb10ae22192
7  clang-3.5       0x0000000001450d87
llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc, llvm::EVT,
llvm::SDValue, llvm::SDValue) + 6983
8  clang-3.5       0x000000000154862f
9  clang-3.5       0x0000000001550d4b
10 clang-3.5       0x00000000014e9906
11 clang-3.5       0x00000000014ea29a llvm::SelectionDAG::LegalizeTypes() + 938
12 clang-3.5       0x00000000014a7a8c
llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 540
13 clang-3.5       0x00000000014ac427
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) +
1719
14 clang-3.5       0x00000000014ad840
llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) +
800
15 clang-3.5       0x0000000000ebc6af
llvm::FPPassManager::runOnFunction(llvm::Function&) + 655
16 clang-3.5       0x0000000000ebcb8b
llvm::FPPassManager::runOnModule(llvm::Module&) + 43
17 clang-3.5       0x0000000000ebcecd
llvm::legacy::PassManagerImpl::run(llvm::Module&) + 797
18 clang-3.5       0x000000000175c8be
clang::EmitBackendOutput(clang::DiagnosticsEngine&,
clang::CodeGenOptions const&, clang::TargetOptions const&,
clang::LangOptions const&, llvm::StringRef, llvm::Module*,
clang::BackendAction, llvm::raw_ostream*) + 2990
19 clang-3.5       0x000000000175736f
20 clang-3.5       0x0000000001ba861b clang::ParseAST(clang::Sema&,
bool, bool) + 507
21 clang-3.5       0x0000000001757f1b clang::CodeGenAction::ExecuteAction() + 59
22 clang-3.5       0x0000000001293ef6 clang::FrontendAction::Execute() + 150
23 clang-3.5       0x00000000012765a0
clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 352
24 clang-3.5       0x0000000001310ba1
clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 1921
25 clang-3.5       0x00000000006dd5a8 cc1_main(char const**, char
const**, char const*, void*) + 1272
26 clang-3.5       0x00000000006b6df3 main + 755
27 libc.so.6       0x00007fb10ae1476d __libc_start_main + 237
28 clang-3.5       0x00000000006db289

On Mon, May 19, 2014 at 9:28 PM, Alexander Potapenko <glider at google.com> wrote:
> Sorry, having tough times doing so.
> For some reason `clang $some_flags -c foo.cc -o foo.o` crashes for me,
> but `clang $some_flags -c foo.cc -E -o foo.ii; clang $some_flags -c
> foo.ii` does not.
> Trying to reduce the command line.
>
> On Mon, May 19, 2014 at 8:47 PM, Benjamin Kramer <benny.kra at gmail.com> wrote:
>>
>> On 19.05.2014, at 18:44, Alexander Potapenko <glider at google.com> wrote:
>>
>>> This broke Chromium compilation w/ThreadSanitizer on one of our
>>> buildbots. Let me know if you need a repro.
>>
>> Can you send me preprocessed source or IR?
>>
>> - Ben
>>
>>>
>>> FAILED: /usr/local/google/home/dtoolsbot/llvm-buildbot/slave/linux-chrome-tsan/build/clang_build/bin/clang
>>> -MMD -MF obj/third_party/mesa/src/src/mesa/main/mesa.pack.o.d
>>> '-DMAPI_ABI_HEADER="glapi_mapi_tmp_shared.h"' '-DPACKAGE_NAME="Mesa"'
>>> '-DPACKAGE_TARNAME="mesa"' '-DPACKAGE_VERSION="9.0.3"'
>>> '-DPACKAGE_STRING="Mesa\ 9.0.3"'
>>> '-DPACKAGE_BUGREPORT="https://bugs.freedesktop.org/enter_bug.cgi\?product=Mesa"'
>>> '-DPACKAGE_URL=""' '-DPACKAGE="mesa"' '-DVERSION="9.0.3"'
>>> -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1
>>> -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1
>>> -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1
>>> -DHAVE_DLFCN_H=1 '-DLT_OBJDIR=".libs/"' -DYYTEXT_POINTER=1
>>> -DHAVE_LIBEXPAT=1 -DHAVE_LIBXCB_DRI2=1 -DFEATURE_GL=1
>>> -DMAPI_MODE_GLAPI -DIN_DRI_DRIVER -DUSE_XCB -DGLX_INDIRECT_RENDERING
>>> -DGLX_DIRECT_RENDERING -DUSE_EXTERNAL_DXTN_LIB=1 -DIN_DRI_DRIVER
>>> -DHAVE_ALIAS -DHAVE_MINCORE -DHAVE_LIBUDEV -D_GLAPI_NO_EXPORTS
>>> -DV8_DEPRECATION_WARNINGS -DBLINK_SCALE_FILTERS_AT_RECORD_TIME
>>> -D_FILE_OFFSET_BITS=64 -DNO_TCMALLOC -DDISABLE_NACL -D_GNU_SOURCE
>>> -DHAVE_DLOPEN -DHAVE_PTHREAD=1 -DHAVE_UNISTD_H=1 -DHAVE_POSIX_MEMALIGN
>>> -DCHROMIUM_BUILD -DCR_CLANG_REVISION=206824 -DTOOLKIT_VIEWS=1
>>> -DUI_COMPOSITOR_IMAGE_TRANSPORT -DUSE_AURA=1 -DUSE_CAIRO=1
>>> -DUSE_GLIB=1 -DUSE_DEFAULT_RENDER_THEME=1 -DUSE_LIBJPEG_TURBO=1
>>> -DUSE_X11=1 -DUSE_CLIPBOARD_AURAX11=1 -DENABLE_ONE_CLICK_SIGNIN
>>> -DUSE_XI2_MT=2 -DENABLE_REMOTING=1 -DENABLE_WEBRTC=1
>>> -DENABLE_PEPPER_CDMS -DENABLE_CONFIGURATION_POLICY
>>> -DENABLE_NOTIFICATIONS -DUSE_UDEV -DENABLE_EGLIMAGE=1
>>> -DENABLE_TASK_MANAGER=1 -DENABLE_EXTENSIONS=1
>>> -DENABLE_PLUGIN_INSTALLATION=1 -DENABLE_PLUGINS=1
>>> -DENABLE_SESSION_SERVICE=1 -DENABLE_THEMES=1
>>> -DENABLE_AUTOFILL_DIALOG=1 -DENABLE_BACKGROUND=1 -DENABLE_GOOGLE_NOW=1
>>> -DCLD_VERSION=2 -DENABLE_FULL_PRINTING=1 -DENABLE_PRINTING=1
>>> -DENABLE_SPELLCHECK=1 -DENABLE_CAPTIVE_PORTAL_DETECTION=1
>>> -DENABLE_APP_LIST=1 -DENABLE_SETTINGS_APP=1 -DENABLE_MANAGED_USERS=1
>>> -DENABLE_MDNS=1 -DENABLE_SERVICE_DISCOVERY=1 -DUSE_NSS=1
>>> -DMEMORY_TOOL_REPLACES_ALLOCATOR -DTHREAD_SANITIZER
>>> -DDYNAMIC_ANNOTATIONS_EXTERNAL_IMPL=1
>>> -DWTF_USE_DYNAMIC_ANNOTATIONS_NOIMPL=1 -DNDEBUG
>>> -DDYNAMIC_ANNOTATIONS_ENABLED=1 -DWTF_USE_DYNAMIC_ANNOTATIONS=1
>>> -I../../third_party/mesa/src/src/gallium/auxiliary
>>> -I../../third_party/mesa/src/src/gallium/include
>>> -I../../third_party/mesa/src/src/glsl
>>> -I../../third_party/mesa/src/src/glsl/glcpp
>>> -I../../third_party/mesa/src/src/mapi
>>> -I../../third_party/mesa/src/src/mapi/glapi
>>> -I../../third_party/mesa/src/src/mesa
>>> -I../../third_party/mesa/src/src/mesa/main
>>> -I../../third_party/mesa/src/chromium_gensrc/mesa
>>> -I../../third_party/mesa/src/chromium_gensrc/mesa/main
>>> -I../../third_party/mesa/src/chromium_gensrc/mesa/program
>>> -I../../third_party/mesa/src/chromium_gensrc/mesa/glapi
>>> -I../../third_party/mesa/src/include
>>> '-I../../third_party/libc++/trunk/include'
>>> '-I../../third_party/libc++abi/trunk/include' -fstack-protector
>>> --param=ssp-buffer-size=4 -Werror -pthread -fno-exceptions
>>> -fno-strict-aliasing -Wno-unused-parameter
>>> -Wno-missing-field-initializers -fvisibility=hidden -pipe -fPIC
>>> -Wheader-hygiene -Wno-char-subscripts
>>> -Wno-unneeded-internal-declaration -Wno-covered-switch-default
>>> -Wno-c++11-narrowing -Wno-reserved-user-defined-literal
>>> -Wno-deprecated-register -Wno-absolute-value -fcolor-diagnostics
>>> -B/usr/local/google/home/dtoolsbot/llvm-buildbot/slave/linux-chrome-tsan/build/chrome/src/third_party/binutils/Linux_x64/Release/bin
>>> -fPIC -Wno-tautological-constant-out-of-range-compare -Wno-format
>>> -Wno-unused-result -m64 -march=x86-64 -fno-omit-frame-pointer
>>> -gline-tables-only -fsanitize=thread -fPIC
>>> -fsanitize-blacklist=../../tools/valgrind/tsan_v2/ignores.txt -O2
>>> -fdata-sections -ffunction-sections -funwind-tables   -c
>>> ../../third_party/mesa/src/src/mesa/main/pack.c -o
>>> obj/third_party/mesa/src/src/mesa/main/mesa.pack.o
>>> clang-3.5: /usr/local/google/home/dtoolsbot/llvm-buildbot/slave/linux-chrome-tsan/build/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3066:
>>> llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc,
>>> llvm::EVT, llvm::SDValue, llvm::SDValue): Assertion `(!VT.isVector()
>>> || VT == N2.getValueType()) && "Vector shift amounts must be in the
>>> same as their first arg"' failed.
>>> 0  clang-3.5       0x000000000113c372 llvm::sys::PrintStackTrace(_IO_FILE*) + 34
>>> 1  clang-3.5       0x000000000113bf94
>>> 2  libpthread.so.0 0x00007f3f46cb2cb0
>>> 3  libc.so.6       0x00007f3f45eed425 gsignal + 53
>>> 4  libc.so.6       0x00007f3f45ef0b8b abort + 379
>>> 5  libc.so.6       0x00007f3f45ee60ee
>>> 6  libc.so.6       0x00007f3f45ee6192
>>> 7  clang-3.5       0x0000000001450c87
>>> llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc, llvm::EVT,
>>> llvm::SDValue, llvm::SDValue) + 6983
>>> 8  clang-3.5       0x000000000154852f
>>> 9  clang-3.5       0x0000000001550c4b
>>> 10 clang-3.5       0x00000000014e9806
>>> 11 clang-3.5       0x00000000014ea19a llvm::SelectionDAG::LegalizeTypes() + 938
>>> 12 clang-3.5       0x00000000014a798c
>>> llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 540
>>> 13 clang-3.5       0x00000000014ac327
>>> llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) +
>>> 1719
>>> 14 clang-3.5       0x00000000014ad740
>>> llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) +
>>> 800
>>> 15 clang-3.5       0x0000000000ebbecf
>>> llvm::FPPassManager::runOnFunction(llvm::Function&) + 655
>>> 16 clang-3.5       0x0000000000ebc3ab
>>> llvm::FPPassManager::runOnModule(llvm::Module&) + 43
>>> 17 clang-3.5       0x0000000000ebc6ed
>>> llvm::legacy::PassManagerImpl::run(llvm::Module&) + 797
>>> 18 clang-3.5       0x000000000175c7be
>>> clang::EmitBackendOutput(clang::DiagnosticsEngine&,
>>> clang::CodeGenOptions const&, clang::TargetOptions const&,
>>> clang::LangOptions const&, llvm::StringRef, llvm::Module*,
>>> clang::BackendAction, llvm::raw_ostream*) + 2990
>>> 19 clang-3.5       0x000000000175726f
>>> 20 clang-3.5       0x0000000001ba7e2b clang::ParseAST(clang::Sema&,
>>> bool, bool) + 507
>>> 21 clang-3.5       0x0000000001757e1b clang::CodeGenAction::ExecuteAction() + 59
>>> 22 clang-3.5       0x0000000001293d26 clang::FrontendAction::Execute() + 150
>>> 23 clang-3.5       0x00000000012763e0
>>> clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 352
>>> 24 clang-3.5       0x0000000001310781
>>> clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 1921
>>> 25 clang-3.5       0x00000000006dd3c8 cc1_main(char const**, char
>>> const**, char const*, void*) + 1272
>>> 26 clang-3.5       0x00000000006b6c13 main + 755
>>> 27 libc.so.6       0x00007f3f45ed876d __libc_start_main + 237
>>> 28 clang-3.5       0x00000000006db0a9
>>>
>>> On Mon, May 19, 2014 at 5:12 PM, Benjamin Kramer
>>> <benny.kra at googlemail.com> wrote:
>>>> Author: d0k
>>>> Date: Mon May 19 08:12:38 2014
>>>> New Revision: 209123
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=209123&view=rev
>>>> Log:
>>>> SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.
>>>>
>>>> - On ARM/ARM64 we get a vrev because the shuffle matching code is really smart. We still unroll anything that's not v4i32 though.
>>>> - On X86 we get a pshufb with SSSE3. Required more cleverness in isShuffleMaskLegal.
>>>> - On PPC we get a vperm for v8i16 and v4i32. v2i64 is unrolled.
>>>>
>>>> Modified:
>>>>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>>>>    llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>>>>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>>>    llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
>>>>    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>>>    llvm/trunk/test/CodeGen/ARM/vrev.ll
>>>>    llvm/trunk/test/CodeGen/ARM64/rev.ll
>>>>    llvm/trunk/test/CodeGen/X86/bswap-vector.ll
>>>>
>>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original)
>>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Mon May 19 08:12:38 2014
>>>> @@ -63,6 +63,8 @@ class VectorLegalizer {
>>>>   SDValue ExpandUINT_TO_FLOAT(SDValue Op);
>>>>   // Implement expansion for SIGN_EXTEND_INREG using SRL and SRA.
>>>>   SDValue ExpandSEXTINREG(SDValue Op);
>>>> +  // Expand bswap of vectors into a shuffle if legal.
>>>> +  SDValue ExpandBSWAP(SDValue Op);
>>>>   // Implement vselect in terms of XOR, AND, OR when blend is not supported
>>>>   // by the target.
>>>>   SDValue ExpandVSELECT(SDValue Op);
>>>> @@ -297,6 +299,8 @@ SDValue VectorLegalizer::LegalizeOp(SDVa
>>>>   case TargetLowering::Expand:
>>>>     if (Node->getOpcode() == ISD::SIGN_EXTEND_INREG)
>>>>       Result = ExpandSEXTINREG(Op);
>>>> +    else if (Node->getOpcode() == ISD::BSWAP)
>>>> +      Result = ExpandBSWAP(Op);
>>>>     else if (Node->getOpcode() == ISD::VSELECT)
>>>>       Result = ExpandVSELECT(Op);
>>>>     else if (Node->getOpcode() == ISD::SELECT)
>>>> @@ -682,6 +686,29 @@ SDValue VectorLegalizer::ExpandSEXTINREG
>>>>   return DAG.getNode(ISD::SRA, DL, VT, Op, ShiftSz);
>>>> }
>>>>
>>>> +SDValue VectorLegalizer::ExpandBSWAP(SDValue Op) {
>>>> +  EVT VT = Op.getValueType();
>>>> +
>>>> +  // Generate a byte wise shuffle mask for the BSWAP.
>>>> +  SmallVector<int, 16> ShuffleMask;
>>>> +  int ScalarSizeInBytes = VT.getScalarSizeInBits() / 8;
>>>> +  for (int I = 0, E = VT.getVectorNumElements(); I != E; ++I)
>>>> +    for (int J = ScalarSizeInBytes - 1; J >= 0; --J)
>>>> +      ShuffleMask.push_back((I * ScalarSizeInBytes) + J);
>>>> +
>>>> +  EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, ShuffleMask.size());
>>>> +
>>>> +  // Only emit a shuffle if the mask is legal.
>>>> +  if (!TLI.isShuffleMaskLegal(ShuffleMask, ByteVT))
>>>> +    return DAG.UnrollVectorOp(Op.getNode());
>>>> +
>>>> +  SDLoc DL(Op);
>>>> +  Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0));
>>>> +  Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT),
>>>> +                            ShuffleMask.data());
>>>> +  return DAG.getNode(ISD::BITCAST, DL, VT, Op);
>>>> +}
>>>> +
>>>> SDValue VectorLegalizer::ExpandVSELECT(SDValue Op) {
>>>>   // Implement VSELECT in terms of XOR, AND, OR
>>>>   // on platforms which do not support blend natively.
>>>>
>>>> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon May 19 08:12:38 2014
>>>> @@ -520,6 +520,8 @@ AArch64TargetLowering::AArch64TargetLowe
>>>>       setOperationAction(ISD::SMUL_LOHI, VT, Expand);
>>>>       setOperationAction(ISD::MULHU, VT, Expand);
>>>>       setOperationAction(ISD::UMUL_LOHI, VT, Expand);
>>>> +
>>>> +      setOperationAction(ISD::BSWAP, VT, Expand);
>>>>     }
>>>>
>>>>     // There is no v1i64/v2i64 multiply, expand v1i64/v2i64 to GPR i64 multiply.
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon May 19 08:12:38 2014
>>>> @@ -414,6 +414,8 @@ ARMTargetLowering::ARMTargetLowering(Tar
>>>>     setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
>>>>     setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand);
>>>>     setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
>>>> +
>>>> +    setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand);
>>>>   }
>>>>
>>>>   setOperationAction(ISD::ConstantFP, MVT::f32, Custom);
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp Mon May 19 08:12:38 2014
>>>> @@ -450,6 +450,8 @@ ARM64TargetLowering::ARM64TargetLowering
>>>>       setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand);
>>>>       setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
>>>>
>>>> +      setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand);
>>>> +
>>>>       for (unsigned InnerVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
>>>>            InnerVT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++InnerVT)
>>>>         setTruncStoreAction((MVT::SimpleValueType)VT,
>>>>
>>>> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon May 19 08:12:38 2014
>>>> @@ -460,6 +460,7 @@ PPCTargetLowering::PPCTargetLowering(PPC
>>>>       setOperationAction(ISD::SDIVREM, VT, Expand);
>>>>       setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand);
>>>>       setOperationAction(ISD::FPOW, VT, Expand);
>>>> +      setOperationAction(ISD::BSWAP, VT, Expand);
>>>>       setOperationAction(ISD::CTPOP, VT, Expand);
>>>>       setOperationAction(ISD::CTLZ, VT, Expand);
>>>>       setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand);
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon May 19 08:12:38 2014
>>>> @@ -15116,7 +15116,23 @@ X86TargetLowering::isShuffleMaskLegal(co
>>>>   if (VT.getSizeInBits() == 64)
>>>>     return false;
>>>>
>>>> -  // FIXME: pshufb, blends, shifts.
>>>> +  // If this is a single-input shuffle with no 128 bit lane crossings we can
>>>> +  // lower it into pshufb.
>>>> +  if ((SVT.is128BitVector() && Subtarget->hasSSSE3()) ||
>>>> +      (SVT.is256BitVector() && Subtarget->hasInt256())) {
>>>> +    bool isLegal = true;
>>>> +    for (unsigned I = 0, E = M.size(); I != E; ++I) {
>>>> +      if (M[I] >= (int)SVT.getVectorNumElements() ||
>>>> +          ShuffleCrosses128bitLane(SVT, I, M[I])) {
>>>> +        isLegal = false;
>>>> +        break;
>>>> +      }
>>>> +    }
>>>> +    if (isLegal)
>>>> +      return true;
>>>> +  }
>>>> +
>>>> +  // FIXME: blends, shifts.
>>>>   return (SVT.getVectorNumElements() == 2 ||
>>>>           ShuffleVectorSDNode::isSplatMask(&M[0], VT) ||
>>>>           isMOVLMask(M, SVT) ||
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/ARM/vrev.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vrev.ll?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/ARM/vrev.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/ARM/vrev.ll Mon May 19 08:12:38 2014
>>>> @@ -178,3 +178,11 @@ entry:
>>>>   ret void
>>>> }
>>>>
>>>> +define <4 x i32> @test_vrev32_bswap(<4 x i32> %source) nounwind {
>>>> +; CHECK-LABEL: test_vrev32_bswap:
>>>> +; CHECK: vrev32.8
>>>> +  %bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %source)
>>>> +  ret <4 x i32> %bswap
>>>> +}
>>>> +
>>>> +declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/ARM64/rev.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/rev.ll?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/ARM64/rev.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/ARM64/rev.ll Mon May 19 08:12:38 2014
>>>> @@ -222,3 +222,14 @@ entry:
>>>>   ret void
>>>> }
>>>>
>>>> +
>>>> +define <4 x i32> @test_vrev32_bswap(<4 x i32> %source) nounwind {
>>>> +; CHECK-LABEL: test_vrev32_bswap:
>>>> +; CHECK: rev32.16b
>>>> +; CHECK-NOT: rev
>>>> +; CHECK: ret
>>>> +  %bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %source)
>>>> +  ret <4 x i32> %bswap
>>>> +}
>>>> +
>>>> +declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/X86/bswap-vector.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap-vector.ll?rev=209123&r1=209122&r2=209123&view=diff
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/X86/bswap-vector.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/X86/bswap-vector.ll Mon May 19 08:12:38 2014
>>>> @@ -1,19 +1,127 @@
>>>> -; RUN: llc < %s -mcpu=x86_64 | FileCheck %s
>>>> +; RUN: llc < %s -mcpu=x86-64 | FileCheck %s -check-prefix=CHECK-NOSSSE3
>>>> +; RUN: llc < %s -mcpu=core2 | FileCheck %s -check-prefix=CHECK-SSSE3
>>>> +; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK-AVX2
>>>> target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
>>>> target triple = "x86_64-unknown-linux-gnu"
>>>>
>>>> +declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
>>>> +declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
>>>> declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
>>>>
>>>> -define <2 x i64> @foo(<2 x i64> %v) #0 {
>>>> +define <8 x i16> @test1(<8 x i16> %v) #0 {
>>>> +entry:
>>>> +  %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
>>>> +  ret <8 x i16> %r
>>>> +
>>>> +; CHECK-NOSSSE3-LABEL: @test1
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: rolw
>>>> +; CHECK-NOSSSE3: retq
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test1
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test1
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> +}
>>>> +
>>>> +define <4 x i32> @test2(<4 x i32> %v) #0 {
>>>> +entry:
>>>> +  %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
>>>> +  ret <4 x i32> %r
>>>> +
>>>> +; CHECK-NOSSSE3-LABEL: @test2
>>>> +; CHECK-NOSSSE3: bswapl
>>>> +; CHECK-NOSSSE3: bswapl
>>>> +; CHECK-NOSSSE3: bswapl
>>>> +; CHECK-NOSSSE3: bswapl
>>>> +; CHECK-NOSSSE3: retq
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test2
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test2
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> +}
>>>> +
>>>> +define <2 x i64> @test3(<2 x i64> %v) #0 {
>>>> entry:
>>>>   %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
>>>>   ret <2 x i64> %r
>>>> +
>>>> +; CHECK-NOSSSE3-LABEL: @test3
>>>> +; CHECK-NOSSSE3: bswapq
>>>> +; CHECK-NOSSSE3: bswapq
>>>> +; CHECK-NOSSSE3: retq
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test3
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test3
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> +}
>>>> +
>>>> +declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>)
>>>> +declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>)
>>>> +declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>)
>>>> +
>>>> +define <16 x i16> @test4(<16 x i16> %v) #0 {
>>>> +entry:
>>>> +  %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
>>>> +  ret <16 x i16> %r
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test4
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test4
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> +}
>>>> +
>>>> +define <8 x i32> @test5(<8 x i32> %v) #0 {
>>>> +entry:
>>>> +  %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
>>>> +  ret <8 x i32> %r
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test5
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test5
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> +}
>>>> +
>>>> +define <4 x i64> @test6(<4 x i64> %v) #0 {
>>>> +entry:
>>>> +  %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
>>>> +  ret <4 x i64> %r
>>>> +
>>>> +; CHECK-SSSE3-LABEL: @test6
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3: pshufb
>>>> +; CHECK-SSSE3-NEXT: retq
>>>> +
>>>> +; CHECK-AVX2-LABEL: @test6
>>>> +; CHECK-AVX2: vpshufb
>>>> +; CHECK-AVX2-NEXT: retq
>>>> }
>>>>
>>>> -; CHECK-LABEL: @foo
>>>> -; CHECK: bswapq
>>>> -; CHECK: bswapq
>>>> -; CHECK: retq
>>>>
>>>> attributes #0 = { nounwind uwtable }
>>>>
>>>>
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>>
>>>
>>> --
>>> Alexander Potapenko
>>> Software Engineer
>>> Google Moscow
>>
>
>
>
> --
> Alexander Potapenko
> Software Engineer
> Google Moscow



-- 
Alexander Potapenko
Software Engineer
Google Moscow
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