[PATCH][X86] Add tablegen patterns to improve the selection of LZCNT and TZCNT instructions in a few cases.

[Andrea Di Biagio]

Thanks Ben!

Committed revision 209159.

On Mon, May 19, 2014 at 9:06 PM, Benjamin Kramer <benny.kra at gmail.com> wrote:
>
> On 16.05.2014, at 17:38, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote:
>
>> Hi,
>>
>> This patch adds new ISel patters to improve the selection of TZCNT and LZCNT.
>>
>> Instructions TZCNT (requires BMI1) and LZCNT (requires LZCNT), always
>> provides the operand size as output if the input operand is zero. We
>> can take advantage of this knowledge during instruction selection
>> stage in order to simplify a few corner case.
>>
>> Scenario:
>> * we want to count the leading/trailing zeros of a value V;
>> * then we check if V is equal to zero; in case (if V is zero), we
>> propagate a constant equal to the sizeof (in bits) of V.
>>
>> Instead of selecting a
>>  tzcnt/lzcnt(V) + compare V with zero + conditional move
>> we only select
>>  tzcnt/lzcnt.
>>
>> The patch adds some test cases to verify that the new patterns do
>> their job and we don't introduce redundant compare+conditional move
>> instructions.
>>
>> Please let me know if ok to submit.
>
> LGTM.
>
> - Ben
>