[llvm] r208956 - ARM64: disable printing of "lslv" type aliases
Tim Northover
tnorthover at apple.com
Fri May 16 02:40:52 PDT 2014
Author: tnorthover
Date: Fri May 16 04:40:52 2014
New Revision: 208956
URL: http://llvm.org/viewvc/llvm-project?rev=208956&view=rev
Log:
ARM64: disable printing of "lslv" type aliases
You can write "lslv w0, w1, w2" (probably for legacy reasons), but it should be
printed as simply "lsl".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
Modified:
llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td
Modified: llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td?rev=208956&r1=208955&r2=208956&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td Fri May 16 04:40:52 2014
@@ -1255,7 +1255,7 @@ multiclass Shift<bits<2> shift_type, str
class ShiftAlias<string asm, Instruction inst, RegisterClass regtype>
: InstAlias<asm#" $dst, $src1, $src2",
- (inst regtype:$dst, regtype:$src1, regtype:$src2)>;
+ (inst regtype:$dst, regtype:$src1, regtype:$src2), 0>;
class BaseMulAccum<bit isSub, bits<3> opc, RegisterClass multype,
RegisterClass addtype, string asm,
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