[PATCH] [ARM64] Split tbz/tbnz into W/X register variant

[Tim Northover]

Hi Bradley,

Nearly there, but I think there's still one problem:

================
Comment at: lib/Target/ARM64/ARM64InstrFormats.td:1068-1070
@@ +1067,5 @@
+
+def tbz_imm32_63 : Operand<i64>, ImmLeaf<i64, [{
+  return (((uint32_t)Imm) < 64);
+}]> {
+  let ParserMatchClass = TBZImm32_63Operand;
----------------
The ImmLeaf predicate here looks wrong.

If you want to match "(ARM64tbz GPR64:$Rn, 0)" it needs to go via a separate Pat using EXTRACT_SUBREG. Otherwise you'll create an instruction like "TBZX %x0, 0", which may print plausibly but will almost certainly be encoded incorrectly.

================
Comment at: test/CodeGen/AArch64/analyze-branch.ll:150
@@ -149,3 +149,3 @@
 
-; CHECK: tbnz {{w[0-9]+}}, #15, [[FALSE:.LBB[0-9]+_[0-9]+]]
+; CHECK: tbnz {{[wx][0-9]+}}, #15, [[FALSE:.LBB[0-9]+_[0-9]+]]
 ; CHECK-NEXT: // BB#
----------------
And this is the test-level manifestation of the bug.

http://reviews.llvm.org/D3784