[PATCH] InstCombine: Optimize -x s< cst

Nick Lewycky nlewycky at google.com
Wed May 14 16:51:45 PDT 2014


On 14 May 2014 16:42, David Majnemer <david.majnemer at gmail.com> wrote:

> Hi nicholas,
>
> This gets rid of a sub instruction by moving the negation to the
> constant when valid.
>
> http://reviews.llvm.org/D3773
>
> Files:
>   lib/Transforms/InstCombine/InstCombineCompares.cpp
>   test/Transforms/InstCombine/icmp.ll
>
> Index: lib/Transforms/InstCombine/InstCombineCompares.cpp
> ===================================================================
> --- lib/Transforms/InstCombine/InstCombineCompares.cpp
> +++ lib/Transforms/InstCombine/InstCombineCompares.cpp
> @@ -2971,6 +2971,15 @@
>          BO0->hasOneUse() && BO1->hasOneUse())
>        return new ICmpInst(Pred, D, B);
>
> +    // icmp (0-X) < cst --> -cst < x
>

We canonicalize constants on the right. This should be "icmp -x < cst -->
icmp x > -cst".


> +    if (NoOp0WrapProblem && ICmpInst::isSigned(Pred)) {
> +      Value *X;
> +      if (match(BO0, m_Neg(m_Value(X))))
> +        if (ConstantInt *RHSC = dyn_cast<ConstantInt>(Op1))
> +          if (!RHSC->isMinValue(/*isSigned=*/true))
> +            return new ICmpInst(I.getPredicate(),
> ConstantExpr::getNeg(RHSC), X);
>

return new ICmpInst(I.getSwappedPredicate(), X, ConstantExpr::getNeg(RHSC));

LGTM


Can you do something similar for m_Not and ICmpInst::isUnsigned?

Nick

+    }
> +
>      BinaryOperator *SRem = nullptr;
>      // icmp (srem X, Y), Y
>      if (BO0 && BO0->getOpcode() == Instruction::SRem &&
> Index: test/Transforms/InstCombine/icmp.ll
> ===================================================================
> --- test/Transforms/InstCombine/icmp.ll
> +++ test/Transforms/InstCombine/icmp.ll
> @@ -1356,3 +1356,12 @@
>   %z = icmp ne i32 %x, %y
>   ret i1 %z
>  }
> +
> +; CHECK-LABEL: @icmp_neg_cst_slt
> +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %a, 10
> +; CHECK-NEXT: ret i1 [[CMP]]
> +define i1 @icmp_neg_cst_slt(i32 %a) {
> +  %1 = sub nsw i32 0, %a
> +  %2 = icmp slt i32 %1, -10
> +  ret i1 %2
> +}
>
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