[llvm] r208740 - R600/SI: Try to fix BFE operands when moving to VALU
Matt Arsenault
Matthew.Arsenault at amd.com
Tue May 13 16:45:50 PDT 2014
Author: arsenm
Date: Tue May 13 18:45:50 2014
New Revision: 208740
URL: http://llvm.org/viewvc/llvm-project?rev=208740&view=rev
Log:
R600/SI: Try to fix BFE operands when moving to VALU
This was broken by r208479
Modified:
llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll
Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.cpp?rev=208740&r1=208739&r2=208740&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.cpp Tue May 13 18:45:50 2014
@@ -1217,12 +1217,12 @@ void SIInstrInfo::moveToVALU(MachineInst
Inst->RemoveOperand(2); // Remove old immediate.
Inst->addOperand(Inst->getOperand(1));
Inst->getOperand(1).ChangeToImmediate(0);
+ Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(Offset));
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(BitWidth));
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(0));
- Inst->addOperand(MachineOperand::CreateImm(0));
}
// Update the destination register class.
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll?rev=208740&r1=208739&r2=208740&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll Tue May 13 18:45:50 2014
@@ -39,3 +39,12 @@ define void @bfe_i32_imm_arg_arg(i32 add
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
ret void
}
+
+; FUNC-LABEL: @v_bfe_print_arg
+; SI: V_BFE_I32 v{{[0-9]+}}, v{{[0-9]+}}, 2, 8
+define void @v_bfe_print_arg(i32 addrspace(1)* %out, i32 addrspace(1)* %src0) nounwind {
+ %load = load i32 addrspace(1)* %src0, align 4
+ %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 2, i32 8) nounwind readnone
+ store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
+ ret void
+}
More information about the llvm-commits
mailing list