[llvm] r208479 - R600/SI: Prettier display of input modifiers
Matt Arsenault
Matthew.Arsenault at amd.com
Tue May 13 15:58:03 PDT 2014
On 05/13/2014 03:54 PM, Tom Stellard wrote:
> On Tue, May 13, 2014 at 03:48:12PM -0700, Matt Arsenault wrote:
>> On 05/13/2014 03:45 PM, Tom Stellard wrote:
>>> On Mon, May 12, 2014 at 05:06:28PM -0700, Matt Arsenault wrote:
>>>> On May 10, 2014, at 12:18 PM, Vincent Lejeune <vljn at ovi.com> wrote:
>>>>
>>>>> class VOP3_32 <bits<9> op, string opName, list<dag> pattern> : VOP3 <
>>>>> op, (outs VReg_32:$dst),
>>>>> - (ins VSrc_32:$src0, VSrc_32:$src1, VSrc_32:$src2,
>>>>> - InstFlag:$abs, InstFlag:$clamp, InstFlag:$omod, InstFlag:$neg),
>>>>> - opName#" $dst, $src0, $src1, $src2, $abs, $clamp, $omod, $neg", pattern
>>>>> + (ins InputMods: $src0_modifiers, VSrc_32:$src0, InputMods:$src1_modifiers,
>>>>> + VSrc_32:$src1, InputMods:$src2_modifiers, VSrc_32:$src2,
>>>>> + InstFlag:$clamp, InstFlag:$omod),
>>>>> + opName#" $dst, $src0_modifiers, $src1, $src2, $clamp, $omod", pattern
>>>>>> , VOP <opName>;
>>>> This seems to be breaking BFE instructions, since the bitwidth always ends up as 0. Is $src1_modifiers supposed to be included in the asm string instead of src1?
>>>>
>>>> e.g.
>>>>
>>>> declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
>>>>
>>>> define void @foo(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) nounwind {
>>>> %load = load i32 addrspace(1)* %ptr, align 4
>>>> %bfe0 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 0, i32 8) nounwind readnone
>>>> store i32 %bfe0, i32 addrspace(1)* %out, align 4
>>>> ret void
>>>> }
>>>>
>>>> Now produces
>>>>
>>>> V_BFE_I32 v0, v0, 0, 0, 0, 0
>>> What is the expected output?
>>>
>>> -Tom
>> It should be V_BFE_I32 destreg, srcreg, offset, width, which in this
>> case should be V_BFE_I32 v0, v0, 0, 8
> Could this be a bug in the convertToVALU code?
>
> -Tom
That's what I'm pretty sure it is, I'm just trying to understand how to
map all the extra flag arguments to the correct MachineOperands
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