[llvm] r208166 - Allow using normal .eh_frame based unwinding on ARM. Use the same

Evgeniy Stepanov eugeni.stepanov at gmail.com
Tue May 13 04:56:42 PDT 2014


Here it is, without ASan:

$ cat 1.ii
void fn1 ();
void
fn2 ()
{
    switch (0)
    case 0:
    switch (0)
    case 0:
    try
    {
        fn1 ();
    }
    catch (int &)
    {
    }
}
$ clang++ -target arm-linux-androideabi  -O0 -S 1.ii
clang++: ../lib/Target/ARM/ARMTargetObjectFile.cpp:53: virtual const
llvm::MCExpr* llvm::ARMElfTargetObjectFile::getTTypeGlobalReference(const
llvm::GlobalValue*, unsigned int, llvm::Mangler&, const
llvm::TargetMachine&, llvm::MachineModuleInfo*, llvm::MCStreamer&)
const: Assertion `Encoding == DW_EH_PE_absptr && "Can handle absptr
encoding only"' failed.


On Tue, May 13, 2014 at 3:23 PM, Evgeniy Stepanov
<eugeni.stepanov at gmail.com> wrote:
> Hi,
>
> this commit broke asan on arm-android, see
> http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/9520/steps/build%20Android%20runtime%20and%20tests/logs/stdio
>
> I'll see if I can make a minimized testcase.
>
>
> On Wed, May 7, 2014 at 11:49 AM, Joerg Sonnenberger <joerg at bec.de> wrote:
>> Author: joerg
>> Date: Wed May  7 02:49:34 2014
>> New Revision: 208166
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=208166&view=rev
>> Log:
>> Allow using normal .eh_frame based unwinding on ARM. Use the same
>> encodings as x86. Use this exception model for NetBSD.
>>
>> Added:
>>     llvm/trunk/test/CodeGen/ARM/dwarf-eh.ll
>> Modified:
>>     llvm/trunk/lib/MC/MCObjectFileInfo.cpp
>>     llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.cpp
>>     llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
>>     llvm/trunk/test/CodeGen/ARM/ehabi.ll
>>
>> Modified: llvm/trunk/lib/MC/MCObjectFileInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCObjectFileInfo.cpp?rev=208166&r1=208165&r2=208166&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/MC/MCObjectFileInfo.cpp (original)
>> +++ llvm/trunk/lib/MC/MCObjectFileInfo.cpp Wed May  7 02:49:34 2014
>> @@ -260,6 +260,10 @@ void MCObjectFileInfo::InitELFMCObjectFi
>>    }
>>
>>    switch (T.getArch()) {
>> +  case Triple::arm:
>> +  case Triple::armeb:
>> +  case Triple::thumb:
>> +  case Triple::thumbeb:
>>    case Triple::x86:
>>      PersonalityEncoding = (RelocM == Reloc::PIC_)
>>       ? dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4
>>
>> Modified: llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.cpp?rev=208166&r1=208165&r2=208166&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.cpp Wed May  7 02:49:34 2014
>> @@ -11,6 +11,7 @@
>>  #include "ARMSubtarget.h"
>>  #include "llvm/ADT/StringExtras.h"
>>  #include "llvm/IR/Mangler.h"
>> +#include "llvm/MC/MCAsmInfo.h"
>>  #include "llvm/MC/MCContext.h"
>>  #include "llvm/MC/MCExpr.h"
>>  #include "llvm/MC/MCSectionELF.h"
>> @@ -45,6 +46,10 @@ const MCExpr *ARMElfTargetObjectFile::ge
>>      const GlobalValue *GV, unsigned Encoding, Mangler &Mang,
>>      const TargetMachine &TM, MachineModuleInfo *MMI,
>>      MCStreamer &Streamer) const {
>> +  if (TM.getMCAsmInfo()->getExceptionHandlingType() != ExceptionHandling::ARM)
>> +    return TargetLoweringObjectFileELF::getTTypeGlobalReference(
>> +        GV, Encoding, Mang, TM, MMI, Streamer);
>> +
>>    assert(Encoding == DW_EH_PE_absptr && "Can handle absptr encoding only");
>>
>>    return MCSymbolRefExpr::Create(TM.getSymbol(GV, Mang),
>>
>> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp?rev=208166&r1=208165&r2=208166&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp Wed May  7 02:49:34 2014
>> @@ -59,7 +59,14 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo(StringR
>>    SupportsDebugInformation = true;
>>
>>    // Exceptions handling
>> -  ExceptionsType = ExceptionHandling::ARM;
>> +  switch (TheTriple.getOS()) {
>> +  case Triple::NetBSD:
>> +    ExceptionsType = ExceptionHandling::DwarfCFI;
>> +    break;
>> +  default:
>> +    ExceptionsType = ExceptionHandling::ARM;
>> +    break;
>> +  }
>>
>>    // foo(plt) instead of foo at plt
>>    UseParensForSymbolVariant = true;
>>
>> Added: llvm/trunk/test/CodeGen/ARM/dwarf-eh.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/dwarf-eh.ll?rev=208166&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/dwarf-eh.ll (added)
>> +++ llvm/trunk/test/CodeGen/ARM/dwarf-eh.ll Wed May  7 02:49:34 2014
>> @@ -0,0 +1,71 @@
>> +; RUN: llc -mtriple=arm-netbsd-eabi -o - -filetype=asm %s | \
>> +; RUN: FileCheck %s
>> +; RUN: llc -mtriple=arm-netbsd-eabi -o - -filetype=asm %s \
>> +; RUN: -relocation-model=pic | FileCheck -check-prefix=CHECK-PIC %s
>> +
>> +; ModuleID = 'test.cc'
>> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
>> +target triple = "armv5e--netbsd-eabi"
>> +
>> +%struct.exception = type { i8 }
>> +
>> + at _ZTVN10__cxxabiv117__class_type_infoE = external global i8*
>> + at _ZTS9exception = linkonce_odr constant [11 x i8] c"9exception\00"
>> + at _ZTI9exception = linkonce_odr unnamed_addr constant { i8*, i8* } { i8* bitcast (i8** getelementptr inbounds (i8** @_ZTVN10__cxxabiv117__class_type_infoE, i32 2) to i8*), i8* getelementptr inbounds ([11 x i8]* @_ZTS9exception, i32 0, i32 0) }
>> +
>> +define void @f() uwtable {
>> +  %1 = alloca i8*
>> +  %2 = alloca i32
>> +  %e = alloca %struct.exception*, align 4
>> +  invoke void @g()
>> +          to label %3 unwind label %4
>> +
>> +  br label %16
>> +
>> +  %5 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
>> +          catch i8* bitcast ({ i8*, i8* }* @_ZTI9exception to i8*)
>> +  %6 = extractvalue { i8*, i32 } %5, 0
>> +  store i8* %6, i8** %1
>> +  %7 = extractvalue { i8*, i32 } %5, 1
>> +  store i32 %7, i32* %2
>> +  br label %8
>> +
>> +  %9 = load i32* %2
>> +  %10 = call i32 @llvm.eh.typeid.for(i8* bitcast ({ i8*, i8* }* @_ZTI9exception to i8*)) nounwind
>> +  %11 = icmp eq i32 %9, %10
>> +  br i1 %11, label %12, label %17
>> +
>> +  %13 = load i8** %1
>> +  %14 = call i8* @__cxa_begin_catch(i8* %13) #3
>> +  %15 = bitcast i8* %14 to %struct.exception*
>> +  store %struct.exception* %15, %struct.exception** %e
>> +  call void @__cxa_end_catch()
>> +  br label %16
>> +
>> +  ret void
>> +
>> +  %18 = load i8** %1
>> +  %19 = load i32* %2
>> +  %20 = insertvalue { i8*, i32 } undef, i8* %18, 0
>> +  %21 = insertvalue { i8*, i32 } %20, i32 %19, 1
>> +  resume { i8*, i32 } %21
>> +}
>> +
>> +declare void @g()
>> +
>> +declare i32 @__gxx_personality_v0(...)
>> +
>> +declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
>> +
>> +declare i8* @__cxa_begin_catch(i8*)
>> +
>> +declare void @__cxa_end_catch()
>> +
>> +; CHECK: .cfi_personality 0,
>> +; CHECK: .cfi_lsda 0,
>> +; CHECK: @TType Encoding = absptr
>> +; CHECK: @ Call site Encoding = udata4
>> +; CHECK-PIC: .cfi_personality 155,
>> +; CHECK-PIC: .cfi_lsda 27,
>> +; CHECK-PIC: @TType Encoding = indirect pcrel sdata4
>> +; CHECK-PIC: @ Call site Encoding = udata4
>>
>> Modified: llvm/trunk/test/CodeGen/ARM/ehabi.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ehabi.ll?rev=208166&r1=208165&r2=208166&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/ehabi.ll (original)
>> +++ llvm/trunk/test/CodeGen/ARM/ehabi.ll Wed May  7 02:49:34 2014
>> @@ -50,6 +50,22 @@
>>  ; RUN:     -filetype=asm -o - %s \
>>  ; RUN:   | FileCheck %s --check-prefix=CHECK-V7-FP-ELIM
>>
>> +; RUN: llc -mtriple arm-unknown-netbsd-eabi \
>> +; RUN:     -disable-fp-elim -filetype=asm -o - %s \
>> +; RUN:   | FileCheck %s --check-prefix=DWARF-FP
>> +
>> +; RUN: llc -mtriple arm-unknown-netbsd-eabi \
>> +; RUN:     -filetype=asm -o - %s \
>> +; RUN:   | FileCheck %s --check-prefix=DWARF-FP-ELIM
>> +
>> +; RUN: llc -mtriple armv7-unknown-netbsd-eabi \
>> +; RUN:     -disable-fp-elim -filetype=asm -o - %s \
>> +; RUN:   | FileCheck %s --check-prefix=DWARF-V7-FP
>> +
>> +; RUN: llc -mtriple armv7-unknown-netbsd-eabi \
>> +; RUN:     -filetype=asm -o - %s \
>> +; RUN:   | FileCheck %s --check-prefix=DWARF-V7-FP-ELIM
>> +
>>  ;-------------------------------------------------------------------------------
>>  ; Test 1
>>  ;-------------------------------------------------------------------------------
>> @@ -172,6 +188,93 @@ declare void @_ZSt9terminatev()
>>  ; CHECK-V7-FP-ELIM:   .handlerdata
>>  ; CHECK-V7-FP-ELIM:   .fnend
>>
>> +; DWARF-FP-LABEL: _Z4testiiiiiddddd:
>> +; DWARF-FP:    .cfi_startproc
>> +; DWARF-FP:    .cfi_personality 0, __gxx_personality_v0
>> +; DWARF-FP:    .cfi_lsda 0, .Lexception0
>> +; DWARF-FP:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
>> +; DWARF-FP:    .cfi_def_cfa_offset 36
>> +; DWARF-FP:    .cfi_offset lr, -4
>> +; DWARF-FP:    .cfi_offset r11, -8
>> +; DWARF-FP:    .cfi_offset r10, -12
>> +; DWARF-FP:    .cfi_offset r9, -16
>> +; DWARF-FP:    .cfi_offset r8, -20
>> +; DWARF-FP:    .cfi_offset r7, -24
>> +; DWARF-FP:    .cfi_offset r6, -28
>> +; DWARF-FP:    .cfi_offset r5, -32
>> +; DWARF-FP:    .cfi_offset r4, -36
>> +; DWARF-FP:    add r11, sp, #28
>> +; DWARF-FP:    .cfi_def_cfa r11, 8
>> +; DWARF-FP:    sub sp, sp, #28
>> +; DWARF-FP:    sub sp, r11, #28
>> +; DWARF-FP:    pop {r4, r5, r6, r7, r8, r9, r10, r11, lr}
>> +; DWARF-FP:    mov pc, lr
>> +; DWARF-FP:    .cfi_endproc
>> +
>> +; DWARF-FP-ELIM-LABEL: _Z4testiiiiiddddd:
>> +; DWARF-FP-ELIM:    .cfi_startproc
>> +; DWARF-FP-ELIM:    .cfi_personality 0, __gxx_personality_v0
>> +; DWARF-FP-ELIM:    .cfi_lsda 0, .Lexception0
>> +; DWARF-FP-ELIM:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
>> +; DWARF-FP-ELIM:    .cfi_def_cfa_offset 36
>> +; DWARF-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-FP-ELIM:    .cfi_offset r11, -8
>> +; DWARF-FP-ELIM:    .cfi_offset r10, -12
>> +; DWARF-FP-ELIM:    .cfi_offset r9, -16
>> +; DWARF-FP-ELIM:    .cfi_offset r8, -20
>> +; DWARF-FP-ELIM:    .cfi_offset r7, -24
>> +; DWARF-FP-ELIM:    .cfi_offset r6, -28
>> +; DWARF-FP-ELIM:    .cfi_offset r5, -32
>> +; DWARF-FP-ELIM:    .cfi_offset r4, -36
>> +; DWARF-FP-ELIM:    sub sp, sp, #28
>> +; DWARF-FP-ELIM:    .cfi_def_cfa_offset 64
>> +; DWARF-FP-ELIM:    add sp, sp, #28
>> +; DWARF-FP-ELIM:    pop {r4, r5, r6, r7, r8, r9, r10, r11, lr}
>> +; DWARF-FP-ELIM:    mov pc, lr
>> +; DWARF-FP-ELIM:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-LABEL: _Z4testiiiiiddddd:
>> +; DWARF-V7-FP:    .cfi_startproc
>> +; DWARF-V7-FP:    .cfi_personality 0, __gxx_personality_v0
>> +; DWARF-V7-FP:    .cfi_lsda 0, .Lexception0
>> +; DWARF-V7-FP:    push {r4, r10, r11, lr}
>> +; DWARF-V7-FP:    .cfi_def_cfa_offset 16
>> +; DWARF-V7-FP:    .cfi_offset lr, -4
>> +; DWARF-V7-FP:    .cfi_offset r11, -8
>> +; DWARF-V7-FP:    .cfi_offset r10, -12
>> +; DWARF-V7-FP:    .cfi_offset r4, -16
>> +; DWARF-V7-FP:    add r11, sp, #8
>> +; DWARF-V7-FP:    .cfi_def_cfa r11, 8
>> +; DWARF-V7-FP:    vpush {d8, d9, d10, d11, d12}
>> +; DWARF-V7-FP:    .cfi_offset d12, -24
>> +; DWARF-V7-FP:    .cfi_offset d11, -32
>> +; DWARF-V7-FP:    .cfi_offset d10, -40
>> +; DWARF-V7-FP:    .cfi_offset d9, -48
>> +; DWARF-V7-FP:    sub sp, sp, #24
>> +; DWARF-V7-FP:    sub sp, r11, #48
>> +; DWARF-V7-FP:    vpop {d8, d9, d10, d11, d12}
>> +; DWARF-V7-FP:    pop {r4, r10, r11, pc}
>> +; DWARF-V7-FP:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-ELIM-LABEL: _Z4testiiiiiddddd:
>> +; DWARF-V7-FP-ELIM:    .cfi_startproc
>> +; DWARF-V7-FP-ELIM:    .cfi_personality 0, __gxx_personality_v0
>> +; DWARF-V7-FP-ELIM:    .cfi_lsda 0, .Lexception0
>> +; DWARF-V7-FP-ELIM:    push {r4, lr}
>> +; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 8
>> +; DWARF-V7-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-V7-FP-ELIM:    .cfi_offset r4, -8
>> +; DWARF-V7-FP-ELIM:    vpush {d8, d9, d10, d11, d12}
>> +; DWARF-V7-FP-ELIM:    .cfi_offset d12, -16
>> +; DWARF-V7-FP-ELIM:    .cfi_offset d11, -24
>> +; DWARF-V7-FP-ELIM:    .cfi_offset d10, -32
>> +; DWARF-V7-FP-ELIM:    .cfi_offset d9, -40
>> +; DWARF-V7-FP-ELIM:    sub sp, sp, #24
>> +; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 72
>> +; DWARF-V7-FP-ELIM:    add sp, sp, #24
>> +; DWARF-V7-FP-ELIM:    vpop {d8, d9, d10, d11, d12}
>> +; DWARF-V7-FP-ELIM:    pop {r4, pc}
>> +; DWARF-V7-FP-ELIM:    .cfi_endproc
>>
>>  ;-------------------------------------------------------------------------------
>>  ; Test 2
>> @@ -219,6 +322,48 @@ entry:
>>  ; CHECK-V7-FP-ELIM:   pop   {r11, pc}
>>  ; CHECK-V7-FP-ELIM:   .fnend
>>
>> +; DWARF-FP-LABEL: test2:
>> +; DWARF-FP:    .cfi_startproc
>> +; DWARF-FP:    push {r11, lr}
>> +; DWARF-FP:    .cfi_def_cfa_offset 8
>> +; DWARF-FP:    .cfi_offset lr, -4
>> +; DWARF-FP:    .cfi_offset r11, -8
>> +; DWARF-FP:    mov  r11, sp
>> +; DWARF-FP:    .cfi_def_cfa_register r11
>> +; DWARF-FP:    pop  {r11, lr}
>> +; DWARF-FP:    mov  pc, lr
>> +; DWARF-FP:    .cfi_endproc
>> +
>> +; DWARF-FP-ELIM-LABEL: test2:
>> +; DWARF-FP-ELIM:    .cfi_startproc
>> +; DWARF-FP-ELIM:    push {r11, lr}
>> +; DWARF-FP-ELIM:    .cfi_def_cfa_offset 8
>> +; DWARF-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-FP-ELIM:    .cfi_offset r11, -8
>> +; DWARF-FP-ELIM:    pop  {r11, lr}
>> +; DWARF-FP-ELIM:    mov  pc, lr
>> +; DWARF-FP-ELIM:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-LABEL: test2:
>> +; DWARF-V7-FP:    .cfi_startproc
>> +; DWARF-V7-FP:    push {r11, lr}
>> +; DWARF-V7-FP:    .cfi_def_cfa_offset 8
>> +; DWARF-V7-FP:    .cfi_offset lr, -4
>> +; DWARF-V7-FP:    .cfi_offset r11, -8
>> +; DWARF-V7-FP:    mov  r11, sp
>> +; DWARF-V7-FP:    .cfi_def_cfa_register r11
>> +; DWARF-V7-FP:    pop  {r11, pc}
>> +; DWARF-V7-FP:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-ELIM-LABEL: test2:
>> +; DWARF-V7-FP-ELIM:    .cfi_startproc
>> +; DWARF-V7-FP-ELIM:    push {r11, lr}
>> +; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 8
>> +; DWARF-V7-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-V7-FP-ELIM:    .cfi_offset r11, -8
>> +; DWARF-V7-FP-ELIM:    pop  {r11, pc}
>> +; DWARF-V7-FP-ELIM:    .cfi_endproc
>> +
>>
>>  ;-------------------------------------------------------------------------------
>>  ; Test 3
>> @@ -275,6 +420,56 @@ entry:
>>  ; CHECK-V7-FP-ELIM:   pop   {r4, r5, r11, pc}
>>  ; CHECK-V7-FP-ELIM:   .fnend
>>
>> +; DWARF-FP-LABEL: test3:
>> +; DWARF-FP:    .cfi_startproc
>> +; DWARF-FP:    push {r4, r5, r11, lr}
>> +; DWARF-FP:    .cfi_def_cfa_offset 16
>> +; DWARF-FP:    .cfi_offset lr, -4
>> +; DWARF-FP:    .cfi_offset r11, -8
>> +; DWARF-FP:    .cfi_offset r5, -12
>> +; DWARF-FP:    .cfi_offset r4, -16
>> +; DWARF-FP:    add  r11, sp, #8
>> +; DWARF-FP:    .cfi_def_cfa r11, 8
>> +; DWARF-FP:    pop  {r4, r5, r11, lr}
>> +; DWARF-FP:    mov  pc, lr
>> +; DWARF-FP:    .cfi_endproc
>> +
>> +; DWARF-FP-ELIM-LABEL: test3:
>> +; DWARF-FP-ELIM:    .cfi_startproc
>> +; DWARF-FP-ELIM:    push {r4, r5, r11, lr}
>> +; DWARF-FP-ELIM:    .cfi_def_cfa_offset 16
>> +; DWARF-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-FP-ELIM:    .cfi_offset r11, -8
>> +; DWARF-FP-ELIM:    .cfi_offset r5, -12
>> +; DWARF-FP-ELIM:    .cfi_offset r4, -16
>> +; DWARF-FP-ELIM:    pop  {r4, r5, r11, lr}
>> +; DWARF-FP-ELIM:    mov  pc, lr
>> +; DWARF-FP-ELIM:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-LABEL: test3:
>> +; DWARF-V7-FP:    .cfi_startproc
>> +; DWARF-V7-FP:    push {r4, r5, r11, lr}
>> +; DWARF-V7-FP:    .cfi_def_cfa_offset 16
>> +; DWARF-V7-FP:    .cfi_offset lr, -4
>> +; DWARF-V7-FP:    .cfi_offset r11, -8
>> +; DWARF-V7-FP:    .cfi_offset r5, -12
>> +; DWARF-V7-FP:    .cfi_offset r4, -16
>> +; DWARF-V7-FP:    add  r11, sp, #8
>> +; DWARF-V7-FP:    .cfi_def_cfa r11, 8
>> +; DWARF-V7-FP:    pop  {r4, r5, r11, pc}
>> +; DWARF-V7-FP:    .cfi_endproc
>> +
>> +; DWARF-V7-FP-ELIM-LABEL: test3:
>> +; DWARF-V7-FP-ELIM:    .cfi_startproc
>> +; DWARF-V7-FP-ELIM:    push {r4, r5, r11, lr}
>> +; DWARF-V7-FP-ELIM:    .cfi_def_cfa_offset 16
>> +; DWARF-V7-FP-ELIM:    .cfi_offset lr, -4
>> +; DWARF-V7-FP-ELIM:    .cfi_offset r11, -8
>> +; DWARF-V7-FP-ELIM:    .cfi_offset r5, -12
>> +; DWARF-V7-FP-ELIM:    .cfi_offset r4, -16
>> +; DWARF-V7-FP-ELIM:    pop  {r4, r5, r11, pc}
>> +; DWARF-V7-FP-ELIM:    .cfi_endproc
>> +
>>
>>  ;-------------------------------------------------------------------------------
>>  ; Test 4
>> @@ -308,3 +503,27 @@ entry:
>>  ; CHECK-V7-FP-ELIM:   bx lr
>>  ; CHECK-V7-FP-ELIM:   .cantunwind
>>  ; CHECK-V7-FP-ELIM:   .fnend
>> +
>> +; DWARF-FP-LABEL: test4:
>> +; DWARF-FP-NOT: .cfi_startproc
>> +; DWARF-FP:    mov pc, lr
>> +; DWARF-FP-NOT: .cfi_endproc
>> +; DWARF-FP:    .size test4,
>> +
>> +; DWARF-FP-ELIM-LABEL: test4:
>> +; DWARF-FP-ELIM-NOT: .cfi_startproc
>> +; DWARF-FP-ELIM:     mov pc, lr
>> +; DWARF-FP-ELIM-NOT: .cfi_endproc
>> +; DWARF-FP-ELIM:     .size test4,
>> +
>> +; DWARF-V7-FP-LABEL: test4:
>> +; DWARF-V7-FP-NOT: .cfi_startproc
>> +; DWARF-V7-FP:    bx lr
>> +; DWARF-V7-FP-NOT: .cfi_endproc
>> +; DWARF-V7-FP:    .size test4,
>> +
>> +; DWARF-V7-FP-ELIM-LABEL: test4:
>> +; DWARF-V7-FP-ELIM-NOT: .cfi_startproc
>> +; DWARF-V7-FP-ELIM:     bx lr
>> +; DWARF-V7-FP-ELIM-NOT: .cfi_endproc
>> +; DWARF-V7-FP-ELIM:     .size test4,
>>
>>
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