[llvm] r208660 - Folding into CSEL when there is ZEXT between SETCC and ADD
Weiming Zhao
weimingz at codeaurora.org
Mon May 12 17:40:59 PDT 2014
Author: weimingz
Date: Mon May 12 19:40:58 2014
New Revision: 208660
URL: http://llvm.org/viewvc/llvm-project?rev=208660&view=rev
Log:
Folding into CSEL when there is ZEXT between SETCC and ADD
Normally, patterns like (add x, (setcc cc ...)) will be folded into
(csel x, x+1, not cc). However, if there is a ZEXT after SETCC, they
won't be folded. This patch recognizes the ZEXT and allows the
generation of CSINC.
This patch fixes bug 19680.
Modified:
llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
llvm/trunk/test/CodeGen/ARM64/csel.ll
Modified: llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp?rev=208660&r1=208659&r2=208660&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64ISelLowering.cpp Mon May 12 19:40:58 2014
@@ -6600,8 +6600,16 @@ static bool isSetCC(SDValue Op, SetCCInf
return TValue->isOne() && FValue->isNullValue();
}
+// Returns true if Op is setcc or zext of setcc.
+static bool isSetCCOrZExtSetCC(const SDValue& Op, SetCCInfoAndKind &Info) {
+ if (isSetCC(Op, Info))
+ return true;
+ return ((Op.getOpcode() == ISD::ZERO_EXTEND) &&
+ isSetCC(Op->getOperand(0), Info));
+}
+
// The folding we want to perform is:
-// (add x, (setcc cc ...) )
+// (add x, [zext] (setcc cc ...) )
// -->
// (csel x, (add x, 1), !cc ...)
//
@@ -6613,9 +6621,9 @@ static SDValue performSetccAddFolding(SD
SetCCInfoAndKind InfoAndKind;
// If neither operand is a SET_CC, give up.
- if (!isSetCC(LHS, InfoAndKind)) {
+ if (!isSetCCOrZExtSetCC(LHS, InfoAndKind)) {
std::swap(LHS, RHS);
- if (!isSetCC(LHS, InfoAndKind))
+ if (!isSetCCOrZExtSetCC(LHS, InfoAndKind))
return SDValue();
}
Modified: llvm/trunk/test/CodeGen/ARM64/csel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/csel.ll?rev=208660&r1=208659&r2=208660&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/csel.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/csel.ll Mon May 12 19:40:58 2014
@@ -217,3 +217,14 @@ entry:
%. = select i1 %cmp, i64 1, i64 2
ret i64 %.
}
+
+define i64 @foo19(i64 %a, i64 %b, i64 %c) {
+entry:
+; CHECK-LABEL: foo19:
+; CHECK: cinc x0, x2
+; CHECK-NOT: add
+ %cmp = icmp ult i64 %a, %b
+ %inc = zext i1 %cmp to i64
+ %inc.c = add i64 %inc, %c
+ ret i64 %inc.c
+}
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