[PATCH] Optimize shufflevector that copies an i64/f64 and zeros the rest.
Elena Demikhovsky
elena.demikhovsky at intel.com
Wed May 7 22:40:27 PDT 2014
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:7517
@@ -7514,3 +7516,3 @@
return DAG.getNode(ISD::BITCAST, dl, VT, NewOp);
- } else if ((VT == MVT::v4i32 ||
- (VT == MVT::v4f32 && Subtarget->hasSSE2()))) {
+ } else if (VT == MVT::v4i32 ||
+ (VT.is128BitVector() && Subtarget->hasSSE2())) {
----------------
v4i32 is covered by 128bitVector.
All other LGTM
http://reviews.llvm.org/D3518
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