[PATCH] ARM: Implement big endian bit-conversion for NEON types
James Molloy
james.molloy at arm.com
Wed May 7 10:46:42 PDT 2014
> These conversions are done implicitly when fitting a vector value into a GPR(s), therefore no changes in the calling convetions .td.
But vectors don't get implicitly moved to GPRs unless you're compiling soft-float. Are you only testing softfloat, not hardfloat?
Cheers,
James
================
Comment at: lib/Target/ARM/ARMFastISel.cpp:192
@@ -191,1 +191,3 @@
+ const TargetLowering* getTargetLowering() { return TM.getTargetLowering(); }
+
----------------
Christian Pirker wrote:
> James Molloy wrote:
> > Christian Pirker wrote:
> > > James Molloy wrote:
> > > > This function seems unused?
> > > This function is required to evaluate the [IsBE] predicate for the bitconversion rules that specify the VREV instructions.
> > But that predicate isn't defined anywhere in this patch.
> The [IsBE] predicate is defined in ARMInstrInfo.td (see line 305).
I see. Strange that this hasn't been required before now - is it that you haven't tested with FastISel before this patch?
The * should go nearest the function name: const TargetLowering *getTargetLowering().
http://reviews.llvm.org/D3651
More information about the llvm-commits
mailing list