[llvm] r207937 - AVX-512: minor change in rndscale intrinsic
Philip Reames
listmail at philipreames.com
Mon May 5 09:25:36 PDT 2014
What is the motivation for this change? Not objecting to the change (no
context), but the submission comment needs more detail.
Philip
On 05/04/2014 06:35 AM, Elena Demikhovsky wrote:
> Author: delena
> Date: Sun May 4 08:35:37 2014
> New Revision: 207937
>
> URL: http://llvm.org/viewvc/llvm-project?rev=207937&view=rev
> Log:
> AVX-512: minor change in rndscale intrinsic
>
> Modified:
> llvm/trunk/lib/Target/X86/X86InstrAVX512.td
> llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=207937&r1=207936&r2=207937&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun May 4 08:35:37 2014
> @@ -1384,6 +1384,15 @@ def: Pat<(v8i64 (int_x86_avx512_mask_loa
> (bc_v8i64 (v16i32 immAllZerosV)), GR8:$mask)),
> (VMOVDQU64rmkz (v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)), addr:$ptr)>;
>
> +def: Pat<(int_x86_avx512_mask_storeu_d_512 addr:$ptr, (v16i32 VR512:$src),
> + GR16:$mask),
> + (VMOVDQU32mrk addr:$ptr, (v16i1 (COPY_TO_REGCLASS GR16:$mask, VK16WM)),
> + VR512:$src)>;
> +def: Pat<(int_x86_avx512_mask_storeu_q_512 addr:$ptr, (v8i64 VR512:$src),
> + GR8:$mask),
> + (VMOVDQU64mrk addr:$ptr, (v8i1 (COPY_TO_REGCLASS GR8:$mask, VK8WM)),
> + VR512:$src)>;
> +
> let AddedComplexity = 20 in {
> def : Pat<(v8i64 (vselect VK8WM:$mask, (v8i64 VR512:$src),
> (bc_v8i64 (v16i32 immAllZerosV)))),
> @@ -3754,7 +3763,7 @@ defm VRNDSCALEPSZ : avx512_rndscale<0x08
> EVEX_CD8<32, CD8VF>;
>
> def : Pat<(v16f32 (int_x86_avx512_mask_rndscale_ps_512 (v16f32 VR512:$src1),
> - imm:$src2, (bc_v16f32 (v16i32 immAllZerosV)), (i16 -1),
> + imm:$src2, (v16f32 VR512:$src1), (i16 -1),
> FROUND_CURRENT)),
> (VRNDSCALEPSZr VR512:$src1, imm:$src2)>;
>
> @@ -3764,7 +3773,7 @@ defm VRNDSCALEPDZ : avx512_rndscale<0x09
> VEX_W, EVEX_CD8<64, CD8VF>;
>
> def : Pat<(v8f64 (int_x86_avx512_mask_rndscale_pd_512 (v8f64 VR512:$src1),
> - imm:$src2, (bc_v8f64 (v16i32 immAllZerosV)), (i8 -1),
> + imm:$src2, (v8f64 VR512:$src1), (i8 -1),
> FROUND_CURRENT)),
> (VRNDSCALEPDZr VR512:$src1, imm:$src2)>;
>
>
> Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=207937&r1=207936&r2=207937&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Sun May 4 08:35:37 2014
> @@ -78,7 +78,7 @@ declare <8 x double> @llvm.x86.avx512.ma
>
> define <8 x double> @test7(<8 x double> %a) {
> ; CHECK: vrndscalepd {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0b]
> - %res = call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double> %a, i32 11, <8 x double> zeroinitializer, i8 -1, i32 4)
> + %res = call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double> %a, i32 11, <8 x double> %a, i8 -1, i32 4)
> ret <8 x double>%res
> }
>
> @@ -86,7 +86,7 @@ declare <16 x float> @llvm.x86.avx512.ma
>
> define <16 x float> @test8(<16 x float> %a) {
> ; CHECK: vrndscaleps {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0b]
> - %res = call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float> %a, i32 11, <16 x float> zeroinitializer, i16 -1, i32 4)
> + %res = call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float> %a, i32 11, <16 x float> %a, i16 -1, i32 4)
> ret <16 x float>%res
> }
>
>
>
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