PATCH: SelectionDAG: Remove setOperationAction(ISD::SELECT_CC, MVT::Other, Expand) hack.
Tom Stellard
tom at stellard.net
Fri May 2 14:35:53 PDT 2014
Hi,
I've always had a lot of trouble with ISD::SELECT_CC nodes in the
SelectionDAG, and I think part of the problem is that there is a special
case for ISD::SELECT_CC where targets can use the MVT::Other type to
specify one action for all types. The attached patches remove this
special case and will hopefully help to simplify the legalization and
optimization of ISD::SELECT_CC.
There is one regression on MIPS with these patches:
CodeGen/Mips/selectcc.ll
I can't tell if this is a real regression or just a change in the order of the
code. Daniel, could you take a look at this. I have attached the before and
after output to this email.
Thanks,
Tom
-------------- next part --------------
.text
.abicalls
.section .mdebug.abi32,"", at progbits
.nan legacy
.file "<stdin>"
.text
.globl select_cc_f32
.align 2
.type select_cc_f32, at function
.set nomicromips
.set nomips16
.ent select_cc_f32
select_cc_f32: # @select_cc_f32
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addu $1, $2, $25
lw $2, %got(gf0)($1)
sw $zero, 0($2)
lw $1, %got(gf1)($1)
lui $2, 16256
sw $2, 0($1)
addiu $1, $zero, 0
addiu $2, $zero, 1
c.olt.s $f12, $f14
movt $1, $2, $fcc0
mtc1 $1, $f0
jr $ra
cvt.s.w $f0, $f0
.set at
.set macro
.set reorder
.end select_cc_f32
$tmp0:
.size select_cc_f32, ($tmp0)-select_cc_f32
.globl select_cc_f64
.align 2
.type select_cc_f64, at function
.set nomicromips
.set nomips16
.ent select_cc_f64
select_cc_f64: # @select_cc_f64
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addu $1, $2, $25
lw $2, %got(gd0)($1)
sw $zero, 4($2)
sw $zero, 0($2)
lw $1, %got(gd1)($1)
lui $2, 16368
sw $2, 4($1)
sw $zero, 0($1)
addiu $1, $zero, 0
addiu $2, $zero, 1
c.olt.d $f12, $f14
movt $1, $2, $fcc0
mtc1 $1, $f0
jr $ra
cvt.d.w $f0, $f0
.set at
.set macro
.set reorder
.end select_cc_f64
$tmp1:
.size select_cc_f64, ($tmp1)-select_cc_f64
-------------- next part --------------
0x668ef0: f32 = sint_to_fp 0x6672c0 [ORD=6]
VT = f32
Other = 1
VT = 1
Action = 3
VT Legal = 1
Folding
0x666768: f64 = sint_to_fp 0x66a5a8 [ORD=6]
VT = f64
Other = 1
VT = 1
Action = 3
VT Legal = 1
Folding
.text
.abicalls
.section .mdebug.abi32,"", at progbits
.nan legacy
.file "<stdin>"
.section .rodata.cst4,"aM", at progbits,4
.align 2
$CPI0_0:
.4byte 1065353216 # float 1
.text
.globl select_cc_f32
.align 2
.type select_cc_f32, at function
.set nomicromips
.set nomips16
.ent select_cc_f32
select_cc_f32: # @select_cc_f32
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addu $1, $2, $25
lw $2, %got(gf0)($1)
sw $zero, 0($2)
lw $2, %got(gf1)($1)
lui $3, 16256
sw $3, 0($2)
lw $1, %got($CPI0_0)($1)
lwc1 $f1, %lo($CPI0_0)($1)
mtc1 $zero, $f0
c.olt.s $f12, $f14
jr $ra
movt.s $f0, $f1, $fcc0
.set at
.set macro
.set reorder
.end select_cc_f32
$tmp0:
.size select_cc_f32, ($tmp0)-select_cc_f32
.section .rodata.cst8,"aM", at progbits,8
.align 3
$CPI1_0:
.8byte 4607182418800017408 # double 1
.text
.globl select_cc_f64
.align 2
.type select_cc_f64, at function
.set nomicromips
.set nomips16
.ent select_cc_f64
select_cc_f64: # @select_cc_f64
.frame $sp,0,$ra
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addu $1, $2, $25
lw $2, %got(gd0)($1)
sw $zero, 4($2)
sw $zero, 0($2)
lw $2, %got(gd1)($1)
lui $3, 16368
sw $3, 4($2)
sw $zero, 0($2)
mtc1 $zero, $f0
mtc1 $zero, $f1
lw $1, %got($CPI1_0)($1)
ldc1 $f2, %lo($CPI1_0)($1)
c.olt.d $f12, $f14
jr $ra
movt.d $f0, $f2, $fcc0
.set at
.set macro
.set reorder
.end select_cc_f64
$tmp1:
.size select_cc_f64, ($tmp1)-select_cc_f64
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