[PATCH] [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-V
Daniel Sanders
daniel.sanders at imgtec.com
Wed Apr 30 06:58:54 PDT 2014
These processors will only be available for the integrated assembler at
first (CodeGen will emit a fatal error saying they are not implemented).
The intention is to work through the existing instructions and correctly
annotate the ISA they were added in so that we have a sufficiently good
base to start MIPS64r6 development. MIPS64r6 removes/re-encodes certain
instructions and I believe it is best to define ISA's using set-union's
as far as possible rather than using set-subtraction.
Depends on D3568
http://reviews.llvm.org/D3569
Files:
lib/Target/Mips/Mips.td
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/Mips/MipsSubtarget.h
test/MC/Mips/mips1/valid-xfail.s
test/MC/Mips/mips1/valid.s
test/MC/Mips/mips2/valid-xfail.s
test/MC/Mips/mips2/valid.s
test/MC/Mips/mips3/valid-xfail.s
test/MC/Mips/mips3/valid.s
test/MC/Mips/mips5/valid-xfail.s
test/MC/Mips/mips5/valid.s
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