[llvm] r207501 - [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. XCore edition
Duncan Exon Smith
dexonsmith at apple.com
Tue Apr 29 08:25:17 PDT 2014
> On Apr 29, 2014, at 8:19, David Blaikie <dblaikie at gmail.com> wrote:
>
>> On Tue, Apr 29, 2014 at 12:57 AM, Craig Topper <craig.topper at gmail.com> wrote:
>> Author: ctopper
>> Date: Tue Apr 29 02:57:00 2014
>> New Revision: 207501
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=207501&view=rev
>> Log:
>> [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves.
>
> Is there any point to such a thing, or should it be non-virtual,
> non-final?
+1
> (or non-virtual but final as a defense against an
> accidental override - though we have warnings for that)
AFC[ompiler], but can non-virtual functions even be marked final?
>
>> XCore edition
>>
>> Modified:
>> llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
>> llvm/trunk/lib/Target/XCore/InstPrinter/XCoreInstPrinter.h
>> llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
>> llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
>> llvm/trunk/lib/Target/XCore/XCoreFrameLowering.h
>> llvm/trunk/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
>> llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
>> llvm/trunk/lib/Target/XCore/XCoreISelLowering.h
>> llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
>> llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp
>> llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h
>> llvm/trunk/lib/Target/XCore/XCoreSelectionDAGInfo.h
>> llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
>> llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
>> llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.h
>>
>> Modified: llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp Tue Apr 29 02:57:00 2014
>> @@ -42,7 +42,7 @@ public:
>> const MemoryObject ®ion,
>> uint64_t address,
>> raw_ostream &vStream,
>> - raw_ostream &cStream) const;
>> + raw_ostream &cStream) const override;
>>
>> };
>> }
>>
>> Modified: llvm/trunk/lib/Target/XCore/InstPrinter/XCoreInstPrinter.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/InstPrinter/XCoreInstPrinter.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/InstPrinter/XCoreInstPrinter.h (original)
>> +++ llvm/trunk/lib/Target/XCore/InstPrinter/XCoreInstPrinter.h Tue Apr 29 02:57:00 2014
>> @@ -31,8 +31,8 @@ public:
>> void printInstruction(const MCInst *MI, raw_ostream &O);
>> static const char *getRegisterName(unsigned RegNo);
>>
>> - virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
>> - virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
>> + void printRegName(raw_ostream &OS, unsigned RegNo) const override;
>> + void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
>> private:
>> void printInlineJT(const MCInst *MI, int opNum, raw_ostream &O);
>> void printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O);
>>
>> Modified: llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h (original)
>> +++ llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h Tue Apr 29 02:57:00 2014
>> @@ -21,7 +21,7 @@ namespace llvm {
>> class Target;
>>
>> class XCoreMCAsmInfo : public MCAsmInfoELF {
>> - virtual void anchor();
>> + void anchor() override;
>> public:
>> explicit XCoreMCAsmInfo(StringRef TT);
>> };
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Tue Apr 29 02:57:00 2014
>> @@ -59,7 +59,7 @@ namespace {
>> : AsmPrinter(TM, Streamer), Subtarget(TM.getSubtarget<XCoreSubtarget>()),
>> MCInstLowering(*this) {}
>>
>> - virtual const char *getPassName() const {
>> + const char *getPassName() const override {
>> return "XCore Assembly Printer";
>> }
>>
>> @@ -71,18 +71,18 @@ namespace {
>> void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
>> bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>> unsigned AsmVariant, const char *ExtraCode,
>> - raw_ostream &O);
>> + raw_ostream &O) override;
>> bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
>> unsigned AsmVariant, const char *ExtraCode,
>> raw_ostream &O) override;
>>
>> void emitArrayBound(MCSymbol *Sym, const GlobalVariable *GV);
>> - virtual void EmitGlobalVariable(const GlobalVariable *GV);
>> + void EmitGlobalVariable(const GlobalVariable *GV) override;
>>
>> - void EmitFunctionEntryLabel();
>> - void EmitInstruction(const MachineInstr *MI);
>> - void EmitFunctionBodyStart();
>> - void EmitFunctionBodyEnd();
>> + void EmitFunctionEntryLabel() override;
>> + void EmitInstruction(const MachineInstr *MI) override;
>> + void EmitFunctionBodyStart() override;
>> + void EmitFunctionBodyEnd() override;
>> };
>> } // end of anonymous namespace
>>
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreFrameLowering.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameLowering.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreFrameLowering.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreFrameLowering.h Tue Apr 29 02:57:00 2014
>> @@ -27,29 +27,30 @@ namespace llvm {
>>
>> /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
>> /// the function.
>> - void emitPrologue(MachineFunction &MF) const;
>> - void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
>> + void emitPrologue(MachineFunction &MF) const override;
>> + void emitEpilogue(MachineFunction &MF,
>> + MachineBasicBlock &MBB) const override;
>>
>> bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator MI,
>> - const std::vector<CalleeSavedInfo> &CSI,
>> - const TargetRegisterInfo *TRI) const;
>> + MachineBasicBlock::iterator MI,
>> + const std::vector<CalleeSavedInfo> &CSI,
>> + const TargetRegisterInfo *TRI) const override;
>> bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator MI,
>> - const std::vector<CalleeSavedInfo> &CSI,
>> - const TargetRegisterInfo *TRI) const;
>> + MachineBasicBlock::iterator MI,
>> + const std::vector<CalleeSavedInfo> &CSI,
>> + const TargetRegisterInfo *TRI) const override;
>>
>> void eliminateCallFramePseudoInstr(MachineFunction &MF,
>> - MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator I) const;
>> + MachineBasicBlock &MBB,
>> + MachineBasicBlock::iterator I) const override;
>>
>> - bool hasFP(const MachineFunction &MF) const;
>> + bool hasFP(const MachineFunction &MF) const override;
>>
>> void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
>> - RegScavenger *RS = nullptr) const;
>> + RegScavenger *RS = nullptr) const override;
>>
>> void processFunctionBeforeFrameFinalized(MachineFunction &MF,
>> - RegScavenger *RS = nullptr) const;
>> + RegScavenger *RS = nullptr) const override;
>>
>> //! Stack slot size (4 bytes)
>> static int stackSlotSize() {
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp Tue Apr 29 02:57:00 2014
>> @@ -26,9 +26,9 @@ namespace {
>> static char ID;
>> XCoreFTAOElim() : MachineFunctionPass(ID) {}
>>
>> - virtual bool runOnMachineFunction(MachineFunction &Fn);
>> + bool runOnMachineFunction(MachineFunction &Fn) override;
>>
>> - virtual const char *getPassName() const {
>> + const char *getPassName() const override {
>> return "XCore FRAME_TO_ARGS_OFFSET Elimination";
>> }
>> };
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp Tue Apr 29 02:57:00 2014
>> @@ -44,7 +44,7 @@ namespace {
>> : SelectionDAGISel(TM, OptLevel),
>> Subtarget(*TM.getSubtargetImpl()) { }
>>
>> - SDNode *Select(SDNode *N);
>> + SDNode *Select(SDNode *N) override;
>> SDNode *SelectBRIND(SDNode *N);
>>
>> /// getI32Imm - Return a target constant with the specified value, of type
>> @@ -70,7 +70,7 @@ namespace {
>> bool SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
>> std::vector<SDValue> &OutOps) override;
>>
>> - virtual const char *getPassName() const {
>> + const char *getPassName() const override {
>> return "XCore DAG->DAG Pattern Instruction Selection";
>> }
>>
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Tue Apr 29 02:57:00 2014
>> @@ -97,31 +97,30 @@ namespace llvm {
>> explicit XCoreTargetLowering(XCoreTargetMachine &TM);
>>
>> using TargetLowering::isZExtFree;
>> - virtual bool isZExtFree(SDValue Val, EVT VT2) const;
>> + bool isZExtFree(SDValue Val, EVT VT2) const override;
>>
>>
>> - virtual unsigned getJumpTableEncoding() const;
>> - virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
>> + unsigned getJumpTableEncoding() const override;
>> + MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
>>
>> /// LowerOperation - Provide custom lowering hooks for some operations.
>> - virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
>> + SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
>>
>> /// ReplaceNodeResults - Replace the results of node with an illegal result
>> /// type with new values built out of custom code.
>> ///
>> - virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
>> - SelectionDAG &DAG) const;
>> + void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
>> + SelectionDAG &DAG) const override;
>>
>> /// getTargetNodeName - This method returns the name of a target specific
>> // DAG node.
>> - virtual const char *getTargetNodeName(unsigned Opcode) const;
>> + const char *getTargetNodeName(unsigned Opcode) const override;
>>
>> - virtual MachineBasicBlock *
>> + MachineBasicBlock *
>> EmitInstrWithCustomInserter(MachineInstr *MI,
>> - MachineBasicBlock *MBB) const;
>> + MachineBasicBlock *MBB) const override;
>>
>> - virtual bool isLegalAddressingMode(const AddrMode &AM,
>> - Type *Ty) const;
>> + bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
>>
>> private:
>> const XCoreTargetMachine &TM;
>> @@ -176,44 +175,44 @@ namespace llvm {
>> // Inline asm support
>> std::pair<unsigned, const TargetRegisterClass*>
>> getRegForInlineAsmConstraint(const std::string &Constraint,
>> - MVT VT) const;
>> + MVT VT) const override;
>>
>> // Expand specifics
>> SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const;
>> SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG) const;
>>
>> - virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
>> + SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
>>
>> - virtual void computeMaskedBitsForTargetNode(const SDValue Op,
>> - APInt &KnownZero,
>> - APInt &KnownOne,
>> - const SelectionDAG &DAG,
>> - unsigned Depth = 0) const;
>> + void computeMaskedBitsForTargetNode(const SDValue Op,
>> + APInt &KnownZero,
>> + APInt &KnownOne,
>> + const SelectionDAG &DAG,
>> + unsigned Depth = 0) const override;
>>
>> - virtual SDValue
>> + SDValue
>> LowerFormalArguments(SDValue Chain,
>> CallingConv::ID CallConv,
>> bool isVarArg,
>> const SmallVectorImpl<ISD::InputArg> &Ins,
>> SDLoc dl, SelectionDAG &DAG,
>> - SmallVectorImpl<SDValue> &InVals) const;
>> + SmallVectorImpl<SDValue> &InVals) const override;
>>
>> - virtual SDValue
>> + SDValue
>> LowerCall(TargetLowering::CallLoweringInfo &CLI,
>> - SmallVectorImpl<SDValue> &InVals) const;
>> + SmallVectorImpl<SDValue> &InVals) const override;
>>
>> - virtual SDValue
>> + SDValue
>> LowerReturn(SDValue Chain,
>> CallingConv::ID CallConv, bool isVarArg,
>> const SmallVectorImpl<ISD::OutputArg> &Outs,
>> const SmallVectorImpl<SDValue> &OutVals,
>> - SDLoc dl, SelectionDAG &DAG) const;
>> + SDLoc dl, SelectionDAG &DAG) const override;
>>
>> - virtual bool
>> + bool
>> CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
>> bool isVarArg,
>> const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
>> - LLVMContext &Context) const;
>> + LLVMContext &Context) const override;
>> };
>> }
>>
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h Tue Apr 29 02:57:00 2014
>> @@ -32,55 +32,55 @@ public:
>> /// such, whenever a client has an instance of instruction info, it should
>> /// always be able to get register info as well (through this method).
>> ///
>> - virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
>> + const TargetRegisterInfo &getRegisterInfo() const { return RI; }
>>
>> /// isLoadFromStackSlot - If the specified machine instruction is a direct
>> /// load from a stack slot, return the virtual or physical register number of
>> /// the destination along with the FrameIndex of the loaded stack slot. If
>> /// not, return 0. This predicate must return 0 if the instruction has
>> /// any side effects other than loading from the stack slot.
>> - virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
>> - int &FrameIndex) const;
>> -
>> + unsigned isLoadFromStackSlot(const MachineInstr *MI,
>> + int &FrameIndex) const override;
>> +
>> /// isStoreToStackSlot - If the specified machine instruction is a direct
>> /// store to a stack slot, return the virtual or physical register number of
>> /// the source reg along with the FrameIndex of the loaded stack slot. If
>> /// not, return 0. This predicate must return 0 if the instruction has
>> /// any side effects other than storing to the stack slot.
>> - virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
>> - int &FrameIndex) const;
>> -
>> - virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
>> - MachineBasicBlock *&FBB,
>> - SmallVectorImpl<MachineOperand> &Cond,
>> - bool AllowModify) const;
>> -
>> - virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
>> - MachineBasicBlock *FBB,
>> - const SmallVectorImpl<MachineOperand> &Cond,
>> - DebugLoc DL) const;
>> -
>> - virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
>> -
>> - virtual void copyPhysReg(MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator I, DebugLoc DL,
>> - unsigned DestReg, unsigned SrcReg,
>> - bool KillSrc) const;
>> -
>> - virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator MI,
>> - unsigned SrcReg, bool isKill, int FrameIndex,
>> - const TargetRegisterClass *RC,
>> - const TargetRegisterInfo *TRI) const;
>> -
>> - virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
>> - MachineBasicBlock::iterator MI,
>> - unsigned DestReg, int FrameIndex,
>> - const TargetRegisterClass *RC,
>> - const TargetRegisterInfo *TRI) const;
>> + unsigned isStoreToStackSlot(const MachineInstr *MI,
>> + int &FrameIndex) const override;
>> +
>> + bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
>> + MachineBasicBlock *&FBB,
>> + SmallVectorImpl<MachineOperand> &Cond,
>> + bool AllowModify) const override;
>> +
>> + unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
>> + MachineBasicBlock *FBB,
>> + const SmallVectorImpl<MachineOperand> &Cond,
>> + DebugLoc DL) const override;
>> +
>> + unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
>> +
>> + void copyPhysReg(MachineBasicBlock &MBB,
>> + MachineBasicBlock::iterator I, DebugLoc DL,
>> + unsigned DestReg, unsigned SrcReg,
>> + bool KillSrc) const override;
>> +
>> + void storeRegToStackSlot(MachineBasicBlock &MBB,
>> + MachineBasicBlock::iterator MI,
>> + unsigned SrcReg, bool isKill, int FrameIndex,
>> + const TargetRegisterClass *RC,
>> + const TargetRegisterInfo *TRI) const override;
>> +
>> + void loadRegFromStackSlot(MachineBasicBlock &MBB,
>> + MachineBasicBlock::iterator MI,
>> + unsigned DestReg, int FrameIndex,
>> + const TargetRegisterClass *RC,
>> + const TargetRegisterInfo *TRI) const override;
>>
>> - virtual bool ReverseBranchCondition(
>> - SmallVectorImpl<MachineOperand> &Cond) const;
>> + bool ReverseBranchCondition(
>> + SmallVectorImpl<MachineOperand> &Cond) const override;
>>
>> // Emit code before MBBI to load immediate value into physical register Reg.
>> // Returns an iterator to the new instruction.
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp Tue Apr 29 02:57:00 2014
>> @@ -48,7 +48,7 @@ namespace {
>>
>> bool lowerGlobal(GlobalVariable *GV);
>>
>> - bool runOnModule(Module &M);
>> + bool runOnModule(Module &M) override;
>> };
>> }
>>
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h Tue Apr 29 02:57:00 2014
>> @@ -29,22 +29,23 @@ public:
>>
>> /// Code Generation virtual methods...
>>
>> - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const;
>> + const MCPhysReg *
>> + getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
>>
>> - BitVector getReservedRegs(const MachineFunction &MF) const;
>> + BitVector getReservedRegs(const MachineFunction &MF) const override;
>>
>> - bool requiresRegisterScavenging(const MachineFunction &MF) const;
>> + bool requiresRegisterScavenging(const MachineFunction &MF) const override;
>>
>> - bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;
>> + bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
>>
>> - bool useFPForScavengingIndex(const MachineFunction &MF) const;
>> + bool useFPForScavengingIndex(const MachineFunction &MF) const override;
>>
>> void eliminateFrameIndex(MachineBasicBlock::iterator II,
>> int SPAdj, unsigned FIOperandNum,
>> - RegScavenger *RS = nullptr) const;
>> + RegScavenger *RS = nullptr) const override;
>>
>> // Debug information queries.
>> - unsigned getFrameRegister(const MachineFunction &MF) const;
>> + unsigned getFrameRegister(const MachineFunction &MF) const override;
>>
>> //! Return whether to emit frame moves
>> static bool needsFrameMoves(const MachineFunction &MF);
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreSelectionDAGInfo.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSelectionDAGInfo.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreSelectionDAGInfo.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreSelectionDAGInfo.h Tue Apr 29 02:57:00 2014
>> @@ -25,14 +25,14 @@ public:
>> explicit XCoreSelectionDAGInfo(const XCoreTargetMachine &TM);
>> ~XCoreSelectionDAGInfo();
>>
>> - virtual SDValue
>> + SDValue
>> EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
>> SDValue Chain,
>> SDValue Op1, SDValue Op2,
>> SDValue Op3, unsigned Align, bool isVolatile,
>> bool AlwaysInline,
>> MachinePointerInfo DstPtrInfo,
>> - MachinePointerInfo SrcPtrInfo) const;
>> + MachinePointerInfo SrcPtrInfo) const override;
>> };
>>
>> }
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Tue Apr 29 02:57:00 2014
>> @@ -46,9 +46,9 @@ public:
>> return getTM<XCoreTargetMachine>();
>> }
>>
>> - virtual bool addPreISel();
>> - virtual bool addInstSelector();
>> - virtual bool addPreEmitPass();
>> + bool addPreISel() override;
>> + bool addInstSelector() override;
>> + bool addPreEmitPass() override;
>> };
>> } // namespace
>>
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Tue Apr 29 02:57:00 2014
>> @@ -37,28 +37,28 @@ public:
>> Reloc::Model RM, CodeModel::Model CM,
>> CodeGenOpt::Level OL);
>>
>> - virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
>> - virtual const XCoreFrameLowering *getFrameLowering() const {
>> + const XCoreInstrInfo *getInstrInfo() const override { return &InstrInfo; }
>> + const XCoreFrameLowering *getFrameLowering() const override {
>> return &FrameLowering;
>> }
>> - virtual const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }
>> - virtual const XCoreTargetLowering *getTargetLowering() const {
>> + const XCoreSubtarget *getSubtargetImpl() const override { return &Subtarget; }
>> + const XCoreTargetLowering *getTargetLowering() const override {
>> return &TLInfo;
>> }
>>
>> - virtual const XCoreSelectionDAGInfo* getSelectionDAGInfo() const {
>> + const XCoreSelectionDAGInfo* getSelectionDAGInfo() const override {
>> return &TSInfo;
>> }
>>
>> - virtual const TargetRegisterInfo *getRegisterInfo() const {
>> + const TargetRegisterInfo *getRegisterInfo() const override {
>> return &InstrInfo.getRegisterInfo();
>> }
>> - virtual const DataLayout *getDataLayout() const { return &DL; }
>> + const DataLayout *getDataLayout() const override { return &DL; }
>>
>> // Pass Pipeline Configuration
>> - virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
>> + TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
>>
>> - virtual void addAnalysisPasses(PassManagerBase &PM);
>> + void addAnalysisPasses(PassManagerBase &PM) override;
>> };
>>
>> } // end namespace llvm
>>
>> Modified: llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.h?rev=207501&r1=207500&r2=207501&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.h (original)
>> +++ llvm/trunk/lib/Target/XCore/XCoreTargetObjectFile.h Tue Apr 29 02:57:00 2014
>> @@ -22,7 +22,7 @@ static const unsigned CodeModelLargeSize
>> const MCSection *ReadOnlySectionLarge;
>> const MCSection *DataRelROSectionLarge;
>> public:
>> - void Initialize(MCContext &Ctx, const TargetMachine &TM);
>> + void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
>>
>> const MCSection *
>> getExplicitSectionGlobal(const GlobalValue *GV,
>>
>>
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