[llvm] r207369 - Debug info: Refactor EmitDwarfRegOpPiece to be a member function of

Adrian Prantl aprantl at apple.com
Sun Apr 27 11:25:46 PDT 2014


Author: adrian
Date: Sun Apr 27 13:25:45 2014
New Revision: 207369

URL: http://llvm.org/viewvc/llvm-project?rev=207369&view=rev
Log:
Debug info: Refactor EmitDwarfRegOpPiece to be a member function of
AsmPrinter.
No functional change.

http://reviews.llvm.org/D3373
rdar://problem/15928306

Modified:
    llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp

Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=207369&r1=207368&r2=207369&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
+++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Sun Apr 27 13:25:45 2014
@@ -430,7 +430,17 @@ namespace llvm {
     /// encoding specified.
     virtual unsigned getISAEncoding() { return 0; }
 
+    /// \brief Emit a partial dwarf register operation.
+    /// \param MLoc             the register
+    /// \param PieceSizeInBits  size and
+    /// \param PieceOffsetBits  offset of the piece in bits, if this is one
+    ///                         piece of an aggregate value.
+    void EmitDwarfRegOpPiece(ByteStreamer &BS, const MachineLocation &MLoc,
+                             unsigned PieceSize,
+                             unsigned PieceOffset) const;
+
     /// EmitDwarfRegOp - Emit dwarf register operation.
+    /// \param Indirect   whether this is a register-indirect address
     virtual void EmitDwarfRegOp(ByteStreamer &BS, const MachineLocation &MLoc,
                                 bool Indirect) const;
 

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp?rev=207369&r1=207368&r2=207369&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp Sun Apr 27 13:25:45 2014
@@ -217,30 +217,48 @@ static void emitDwarfRegOpIndirect(ByteS
 /// Emit a dwarf register operation for describing
 /// - a small value occupying only part of a register or
 /// - a small register representing only part of a value.
-static void emitDwarfOpPiece(ByteStreamer &Streamer, unsigned Size,
-                             unsigned Offset) {
-  assert(Size > 0);
-  if (Offset > 0) {
+static void emitDwarfOpPiece(ByteStreamer &Streamer, unsigned SizeInBits,
+                             unsigned OffsetInBits) {
+  assert(SizeInBits > 0 && "zero-sized piece");
+  unsigned SizeOfByte = 8;
+  if (OffsetInBits > 0 || SizeInBits % SizeOfByte) {
     Streamer.EmitInt8(dwarf::DW_OP_bit_piece, "DW_OP_bit_piece");
-    Streamer.EmitULEB128(Size, Twine(Size));
-    Streamer.EmitULEB128(Offset, Twine(Offset));
+    Streamer.EmitULEB128(SizeInBits, Twine(SizeInBits));
+    Streamer.EmitULEB128(OffsetInBits, Twine(OffsetInBits));
   } else {
     Streamer.EmitInt8(dwarf::DW_OP_piece, "DW_OP_piece");
-    unsigned ByteSize = Size / 8; // Assuming 8 bits per byte.
+    unsigned ByteSize = SizeInBits / SizeOfByte;
     Streamer.EmitULEB128(ByteSize, Twine(ByteSize));
   }
 }
 
+/// Emit a shift-right dwarf expression.
+static void emitDwarfOpShr(ByteStreamer &Streamer,
+                           unsigned ShiftBy) {
+  Streamer.EmitInt8(dwarf::DW_OP_constu, "DW_OP_constu");
+  Streamer.EmitULEB128(ShiftBy);
+  Streamer.EmitInt8(dwarf::DW_OP_shr, "DW_OP_shr");
+}
+
 /// Some targets do not provide a DWARF register number for every
-/// register.  This function attempts to emit a dwarf register by
+/// register.  This function attempts to emit a DWARF register by
 /// emitting a piece of a super-register or by piecing together
 /// multiple subregisters that alias the register.
-static void EmitDwarfRegOpPiece(ByteStreamer &Streamer, const AsmPrinter &AP,
-                                const MachineLocation &MLoc) {
+void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
+                                     const MachineLocation &MLoc,
+                                     unsigned PieceSizeInBits,
+                                     unsigned PieceOffsetInBits) const {
   assert(!MLoc.isIndirect());
-  const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
+  const TargetRegisterInfo *TRI = TM.getRegisterInfo();
   int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
 
+  // If this is a valid register number, emit it.
+  if (Reg >= 0) {
+    emitDwarfRegOp(Streamer, Reg);
+    emitDwarfOpPiece(Streamer, PieceSizeInBits, PieceOffsetInBits);
+    return;
+  }
+
   // Walk up the super-register chain until we find a valid number.
   // For example, EAX on x86_64 is a 32-bit piece of RAX with offset 0.
   for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid(); ++SR) {
@@ -249,9 +267,19 @@ static void EmitDwarfRegOpPiece(ByteStre
       unsigned Idx = TRI->getSubRegIndex(*SR, MLoc.getReg());
       unsigned Size = TRI->getSubRegIdxSize(Idx);
       unsigned Offset = TRI->getSubRegIdxOffset(Idx);
-      AP.OutStreamer.AddComment("super-register");
+      OutStreamer.AddComment("super-register");
       emitDwarfRegOp(Streamer, Reg);
-      emitDwarfOpPiece(Streamer, Size, Offset);
+      if (PieceOffsetInBits == Offset) {
+        emitDwarfOpPiece(Streamer, Size, Offset);
+      } else {
+        // If this is part of a variable in a sub-register at a
+        // non-zero offset, we need to manually shift the value into
+        // place, since the DW_OP_piece describes the part of the
+        // variable, not the position of the subregister.
+        emitDwarfOpPiece(Streamer, Size, PieceOffsetInBits);
+        if (Offset)
+          emitDwarfOpShr(Streamer, Offset);
+      }
       return;
     }
   }
@@ -261,7 +289,7 @@ static void EmitDwarfRegOpPiece(ByteStre
   //
   // Keep track of the current position so we can emit the more
   // efficient DW_OP_piece.
-  unsigned CurPos = 0;
+  unsigned CurPos = PieceOffsetInBits;
   // The size of the register in bits, assuming 8 bits per byte.
   unsigned RegSize = TRI->getMinimalPhysRegClass(MLoc.getReg())->getSize() * 8;
   // Keep track of the bits in the register we already emitted, so we
@@ -282,7 +310,7 @@ static void EmitDwarfRegOpPiece(ByteStre
     // If this sub-register has a DWARF number and we haven't covered
     // its range, emit a DWARF piece for it.
     if (Reg >= 0 && Intersection.any()) {
-      AP.OutStreamer.AddComment("sub-register");
+      OutStreamer.AddComment("sub-register");
       emitDwarfRegOp(Streamer, Reg);
       emitDwarfOpPiece(Streamer, Size, Offset == CurPos ? 0 : Offset);
       CurPos = Offset + Size;
@@ -292,7 +320,7 @@ static void EmitDwarfRegOpPiece(ByteStre
     }
   }
 
-  if (CurPos == 0) {
+  if (CurPos == PieceOffsetInBits) {
     // FIXME: We have no reasonable way of handling errors in here.
     Streamer.EmitInt8(dwarf::DW_OP_nop,
                       "nop (could not find a dwarf register number)");
@@ -318,8 +346,7 @@ void AsmPrinter::EmitDwarfRegOp(ByteStre
     }
 
     // Attempt to find a valid super- or sub-register.
-    if (!Indirect && !MLoc.isIndirect())
-      return EmitDwarfRegOpPiece(Streamer, *this, MLoc);
+    return EmitDwarfRegOpPiece(Streamer, MLoc, 0, 0);
   }
 
   if (MLoc.isIndirect())





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