[PATCH] [DAGCombiner] Fold (vextract v, (sext (trunc i))) -> (vextract v, i)

[Nadav Rotem]

LGTM. 

On Apr 24, 2014, at 3:43 PM, Michael Spencer <bigcheesegs at gmail.com> wrote:

> Hi grosbach, nadav,
> 
> EXTRACT_VECTOR_ELT has undefined behavior for element indices greater than
> the input vector width.
> 
> http://reviews.llvm.org/D3494
> 
> Files:
>  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>  test/CodeGen/X86/vec_splat.ll
> 
> Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> @@ -9691,6 +9691,16 @@
>   SDValue EltNo = N->getOperand(1);
>   bool ConstEltNo = isa<ConstantSDNode>(EltNo);
> 
> +  // (vextract v, (sext (trunc i))) -> (vextract v, i)
> +  if (EltNo.getOpcode() == ISD::SIGN_EXTEND &&
> +      EltNo.getOperand(0).getOpcode() == ISD::TRUNCATE) {
> +    SDValue Trunc = EltNo.getOperand(0);
> +    if (Trunc.getValueType().getSizeInBits() >=
> +        Log2_64_Ceil(VT.getVectorNumElements()))
> +      return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), N->getValueType(0),
> +                         InVec, Trunc.getOperand(0));
> +  }
> +
>   // Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
>   // We only perform this optimization before the op legalization phase because
>   // we may introduce new vector instructions which are not backed by TD
> Index: test/CodeGen/X86/vec_splat.ll
> ===================================================================
> --- test/CodeGen/X86/vec_splat.ll
> +++ test/CodeGen/X86/vec_splat.ll
> @@ -48,5 +48,6 @@
> 
> ; AVX-LABEL: load_extract_splat
> ; AVX-NOT: rsp
> +; AVX-NOT: mov
> ; AVX: vbroadcastss
> }
> <D3494.8820.patch>