[llvm] r207092 - [asan] Fix instrumentation of x86 intel syntax inline assembly.

Evgeniy Stepanov eugeni.stepanov at gmail.com
Thu Apr 24 02:56:18 PDT 2014


Author: eugenis
Date: Thu Apr 24 04:56:15 2014
New Revision: 207092

URL: http://llvm.org/viewvc/llvm-project?rev=207092&view=rev
Log:
[asan] Fix instrumentation of x86 intel syntax inline assembly.

Patch by Yuri Gorshenin.


Added:
    llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s
Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp?rev=207092&r1=207091&r2=207092&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp Thu Apr 24 04:56:15 2014
@@ -82,60 +82,60 @@ void X86AddressSanitizer::InstrumentMOV(
     MCContext &Ctx, MCStreamer &Out) {
   // Access size in bytes.
   unsigned AccessSize = 0;
-  unsigned long OpIx = Operands.size();
+
+  // FIXME: use MCInstrDesc to get proper value of IsWrite.
+  bool IsWrite = false;
   switch (Inst.getOpcode()) {
   case X86::MOV8mi:
   case X86::MOV8mr:
     AccessSize = 1;
-    OpIx = 2;
+    IsWrite = true;
     break;
   case X86::MOV8rm:
     AccessSize = 1;
-    OpIx = 1;
     break;
   case X86::MOV16mi:
   case X86::MOV16mr:
     AccessSize = 2;
-    OpIx = 2;
+    IsWrite = true;
     break;
   case X86::MOV16rm:
     AccessSize = 2;
-    OpIx = 1;
     break;
   case X86::MOV32mi:
   case X86::MOV32mr:
     AccessSize = 4;
-    OpIx = 2;
+    IsWrite = true;
     break;
   case X86::MOV32rm:
     AccessSize = 4;
-    OpIx = 1;
     break;
   case X86::MOV64mi32:
   case X86::MOV64mr:
     AccessSize = 8;
-    OpIx = 2;
+    IsWrite = true;
     break;
   case X86::MOV64rm:
     AccessSize = 8;
-    OpIx = 1;
     break;
   case X86::MOVAPDmr:
   case X86::MOVAPSmr:
     AccessSize = 16;
-    OpIx = 2;
+    IsWrite = true;
     break;
   case X86::MOVAPDrm:
   case X86::MOVAPSrm:
     AccessSize = 16;
-    OpIx = 1;
     break;
-  }
-  if (OpIx >= Operands.size())
+  default:
     return;
+  }
 
-  const bool IsWrite = (OpIx != 1);
-  InstrumentMemOperand(Operands[OpIx], AccessSize, IsWrite, Ctx, Out);
+  for (unsigned Ix = 0; Ix < Operands.size(); ++Ix) {
+    MCParsedAsmOperand *Op = Operands[Ix];
+    if (Op && Op->isMem())
+      InstrumentMemOperand(Op, AccessSize, IsWrite, Ctx, Out);
+  }
 }
 
 class X86AddressSanitizer32 : public X86AddressSanitizer {

Added: llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s?rev=207092&view=auto
==============================================================================
--- llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s (added)
+++ llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s Thu Apr 24 04:56:15 2014
@@ -0,0 +1,71 @@
+# RUN: llvm-mc %s -x86-asm-syntax=intel -triple=x86_64-unknown-linux-gnu -asm-instrumentation=address | FileCheck %s
+
+	.text
+	.globl	swap
+	.align	16, 0x90
+	.type	swap, at function
+# CHECK-LABEL: swap:
+#
+# CHECK: subq $128, %rsp
+# CHECK-NEXT: pushq %rdi
+# CHECK-NEXT: leaq (%rcx), %rdi
+# CHECK-NEXT: callq __sanitizer_sanitize_load8 at PLT
+# CHECK-NEXT: popq %rdi
+# CHECK-NEXT: addq $128, %rsp
+#
+# CHECK-NEXT: movq (%rcx), %rax
+#
+# CHECK-NEXT: subq $128, %rsp
+# CHECK-NEXT: pushq %rdi
+# CHECK-NEXT: leaq (%rdx), %rdi
+# CHECK-NEXT: callq __sanitizer_sanitize_load8 at PLT
+# CHECK-NEXT: popq %rdi
+# CHECK-NEXT: addq $128, %rsp
+#
+# CHECK-NEXT: movq (%rdx), %rbx
+#
+# CHECK: subq $128, %rsp
+# CHECK-NEXT: pushq %rdi
+# CHECK-NEXT: leaq (%rcx), %rdi
+# CHECK-NEXT: callq __sanitizer_sanitize_store8 at PLT
+# CHECK-NEXT: popq %rdi
+# CHECK-NEXT: addq $128, %rsp
+#
+# CHECK-NEXT: movq %rbx, (%rcx)
+#
+# CHECK-NEXT: subq $128, %rsp
+# CHECK-NEXT: pushq %rdi
+# CHECK-NEXT: leaq (%rdx), %rdi
+# CHECK-NEXT: callq __sanitizer_sanitize_store8 at PLT
+# CHECK-NEXT: popq %rdi
+# CHECK-NEXT: addq $128, %rsp
+#
+# CHECK-NEXT: movq %rax, (%rdx)
+swap:                                   # @swap
+	.cfi_startproc
+# BB#0:
+	push	rbx
+.Ltmp0:
+	.cfi_def_cfa_offset 16
+.Ltmp1:
+	.cfi_offset rbx, -16
+	mov	rcx, rdi
+	mov	rdx, rsi
+	#APP
+
+
+	mov	rax, qword ptr [rcx]
+	mov	rbx, qword ptr [rdx]
+	mov	qword ptr [rcx], rbx
+	mov	qword ptr [rdx], rax
+
+	#NO_APP
+	pop	rbx
+	ret
+.Ltmp2:
+	.size	swap, .Ltmp2-swap
+	.cfi_endproc
+
+
+	.ident	"clang version 3.5.0 "
+	.section	".note.GNU-stack","", at progbits





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