[llvm] r206732 - Implement builtins for safe division: safe.sdiv.iN, safe.udiv.iN, safe.srem.iN,
atrick at apple.com
Tue Apr 22 17:25:17 PDT 2014
On Apr 22, 2014, at 8:19 AM, Eric Christopher <echristo at gmail.com> wrote:
>> The goal here is to complete the implementation of LLVM’s existing arithmetic with overflow intrinsics. It was originally llvm.sdiv.with.overflow. I objected to that name because it is technically not checking overflow, so I thought that name would be misleading. To me overflow on division means taking a numerator composed of two 64-bit operands and expecting a single 64-bit result (as with x86).
> This is particularly unclear.
The name of the intrinsic is not something we need to quibble over, but I'll try to clarify:
IDIV: Perform signed division of RDX:RAX by the contents of a 64-bit register or memory location and store the quotient in RAX and the remainder in RDX.
So if, for example, the divisor is 1 and RDX is not the sign bit of RAW, we hit what I would call overflow.
The LLVM division intrinsics don't deal with this issue, and I don’t want to confuse people into thinking they do. Rather, they implement the semantics of integer division that I think we want at the IR level (where each operand is the same size as the result).
div(x, 0) == 0
sdiv(min<T>, -1) == min<T>
(this happens to match arm64)
The intrinsics return a boolean to indicate that "overflow" occured, just like all the other llvm.arith.with.overflow intrinsics.
I think an llvm-dev posting will also summarize this.
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the llvm-commits