[llvm] r206889 - AArch64/ARM64: more testing from AArch64 to ARM64
Tim Northover
tnorthover at apple.com
Tue Apr 22 05:45:47 PDT 2014
Author: tnorthover
Date: Tue Apr 22 07:45:47 2014
New Revision: 206889
URL: http://llvm.org/viewvc/llvm-project?rev=206889&view=rev
Log:
AArch64/ARM64: more testing from AArch64 to ARM64
Added:
llvm/trunk/test/CodeGen/ARM64/aarch64-large-frame.ll
Modified:
llvm/trunk/test/CodeGen/AArch64/andCmpBrToTBZ.ll
llvm/trunk/test/CodeGen/AArch64/concatvector-bugs.ll
llvm/trunk/test/CodeGen/AArch64/large-frame.ll
llvm/trunk/test/CodeGen/AArch64/local_vars.ll
Modified: llvm/trunk/test/CodeGen/AArch64/andCmpBrToTBZ.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/andCmpBrToTBZ.ll?rev=206889&r1=206888&r2=206889&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/andCmpBrToTBZ.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/andCmpBrToTBZ.ll Tue Apr 22 07:45:47 2014
@@ -1,4 +1,6 @@
; RUN: llc -O1 -march=aarch64 -enable-andcmp-sinking=true < %s | FileCheck %s
+; arm64 has separate copy of this test
+
; ModuleID = 'and-cbz-extr-mr.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128"
target triple = "aarch64-none-linux-gnu"
Modified: llvm/trunk/test/CodeGen/AArch64/concatvector-bugs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/concatvector-bugs.ll?rev=206889&r1=206888&r2=206889&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/concatvector-bugs.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/concatvector-bugs.ll Tue Apr 22 07:45:47 2014
@@ -2,6 +2,8 @@
; Bug: i8 type in FRP8 register but not registering with register class causes segmentation fault.
; Fix: Removed i8 type from FPR8 register class.
+; Not relevant to arm64.
+
define void @test_concatvector_v8i8() {
entry.split:
br i1 undef, label %if.then, label %if.end
Modified: llvm/trunk/test/CodeGen/AArch64/large-frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/large-frame.ll?rev=206889&r1=206888&r2=206889&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/large-frame.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/large-frame.ll Tue Apr 22 07:45:47 2014
@@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
+; arm64 has a separate copy: aarch64-large-frame.ll (codegen was too different).
declare void @use_addr(i8*)
@addr = global i8* null
Modified: llvm/trunk/test/CodeGen/AArch64/local_vars.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/local_vars.ll?rev=206889&r1=206888&r2=206889&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/local_vars.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/local_vars.ll Tue Apr 22 07:45:47 2014
@@ -1,5 +1,7 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -O0 | FileCheck %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -O0 -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -O0 -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP-AARCH64 %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP-ARM64 %s
; Make sure a reasonably sane prologue and epilogue are
; generated. This test is not robust in the face of an frame-handling
@@ -16,7 +18,7 @@
declare void @foo()
define void @trivial_func() nounwind {
-; CHECK: trivial_func: // @trivial_func
+; CHECK-LABEL: trivial_func: // @trivial_func
; CHECK-NEXT: // BB#0
; CHECK-NEXT: ret
@@ -24,11 +26,14 @@ define void @trivial_func() nounwind {
}
define void @trivial_fp_func() {
-; CHECK-WITHFP-LABEL: trivial_fp_func:
-
-; CHECK-WITHFP: sub sp, sp, #16
-; CHECK-WITHFP: stp x29, x30, [sp]
-; CHECK-WITHFP-NEXT: mov x29, sp
+; CHECK-WITHFP-AARCH64-LABEL: trivial_fp_func:
+; CHECK-WITHFP-AARCH64: sub sp, sp, #16
+; CHECK-WITHFP-AARCH64: stp x29, x30, [sp]
+; CHECK-WITHFP-AARCH64-NEXT: mov x29, sp
+
+; CHECK-WITHFP-ARM64-LABEL: trivial_fp_func:
+; CHECK-WITHFP-ARM64: stp x29, x30, [sp, #-16]!
+; CHECK-WITHFP-ARM64-NEXT: mov x29, sp
; Dont't really care, but it would be a Bad Thing if this came after the epilogue.
; CHECK: bl foo
@@ -48,10 +53,10 @@ define void @stack_local() {
%val = load i64* @var
store i64 %val, i64* %local_var
-; CHECK: str {{x[0-9]+}}, [sp, #{{[0-9]+}}]
+; CHECK-DAG: str {{x[0-9]+}}, [sp, #{{[0-9]+}}]
store i64* %local_var, i64** @local_addr
-; CHECK: add {{x[0-9]+}}, sp, #{{[0-9]+}}
+; CHECK-DAG: add {{x[0-9]+}}, sp, #{{[0-9]+}}
ret void
}
Added: llvm/trunk/test/CodeGen/ARM64/aarch64-large-frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/aarch64-large-frame.ll?rev=206889&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/aarch64-large-frame.ll (added)
+++ llvm/trunk/test/CodeGen/ARM64/aarch64-large-frame.ll Tue Apr 22 07:45:47 2014
@@ -0,0 +1,69 @@
+; RUN: llc -verify-machineinstrs -mtriple=arm64-none-linux-gnu -disable-fp-elim < %s | FileCheck %s
+declare void @use_addr(i8*)
+
+ at addr = global i8* null
+
+define void @test_bigframe() {
+; CHECK-LABEL: test_bigframe:
+; CHECK: .cfi_startproc
+
+ %var1 = alloca i8, i32 20000000
+ %var2 = alloca i8, i32 16
+ %var3 = alloca i8, i32 20000000
+
+; CHECK: sub sp, sp, #16773120
+; CHECK: sub sp, sp, #16773120
+; CHECK: sub sp, sp, #6451200
+; CHECK: sub sp, sp, #2576
+; CHECK: .cfi_def_cfa_offset 40000032
+
+
+; CHECK: add [[TMP:x[0-9]+]], sp, #16773120
+; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #3223552
+; CHECK: add {{x[0-9]+}}, [[TMP1]], #3344
+ store volatile i8* %var1, i8** @addr
+
+ %var1plus2 = getelementptr i8* %var1, i32 2
+ store volatile i8* %var1plus2, i8** @addr
+
+; CHECK: add [[TMP:x[0-9]+]], sp, #16773120
+; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #3223552
+; CHECK: add {{x[0-9]+}}, [[TMP1]], #3328
+ store volatile i8* %var2, i8** @addr
+
+ %var2plus2 = getelementptr i8* %var2, i32 2
+ store volatile i8* %var2plus2, i8** @addr
+
+ store volatile i8* %var3, i8** @addr
+
+ %var3plus2 = getelementptr i8* %var3, i32 2
+ store volatile i8* %var3plus2, i8** @addr
+
+; CHECK: add sp, sp, #16773120
+; CHECK: add sp, sp, #16773120
+; CHECK: add sp, sp, #6451200
+; CHECK: add sp, sp, #2576
+; CHECK: .cfi_endproc
+ ret void
+}
+
+define void @test_mediumframe() {
+; CHECK-LABEL: test_mediumframe:
+ %var1 = alloca i8, i32 1000000
+ %var2 = alloca i8, i32 16
+ %var3 = alloca i8, i32 1000000
+; CHECK: sub sp, sp, #1998848
+; CHECK-NEXT: sub sp, sp, #1168
+
+ store volatile i8* %var1, i8** @addr
+; CHECK: add [[VAR1ADDR:x[0-9]+]], sp, #999424
+; CHECK: add [[VAR1ADDR]], [[VAR1ADDR]], #592
+
+; CHECK: add [[VAR2ADDR:x[0-9]+]], sp, #999424
+; CHECK: add [[VAR2ADDR]], [[VAR2ADDR]], #576
+
+ store volatile i8* %var2, i8** @addr
+; CHECK: add sp, sp, #1998848
+; CHECK: add sp, sp, #1168
+ ret void
+}
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