[llvm] r206861 - [AArch64] Enable global merge pass.
Jiangning Liu
jiangning.liu at arm.com
Mon Apr 21 20:33:27 PDT 2014
Author: jiangning
Date: Mon Apr 21 22:33:26 2014
New Revision: 206861
URL: http://llvm.org/viewvc/llvm-project?rev=206861&view=rev
Log:
[AArch64] Enable global merge pass.
Added:
llvm/trunk/test/CodeGen/AArch64/global_merge_1.ll
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=206861&r1=206860&r2=206861&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Apr 21 22:33:26 2014
@@ -5538,3 +5538,10 @@ int AArch64TargetLowering::getScalingFac
return AM.Scale != 0 && AM.Scale != 1;
return -1;
}
+
+/// getMaximalGlobalOffset - Returns the maximal possible offset which can
+/// be used for loads / stores from the global.
+unsigned AArch64TargetLowering::getMaximalGlobalOffset() const {
+ return 4095;
+}
+
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h?rev=206861&r1=206860&r2=206861&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h Mon Apr 21 22:33:26 2014
@@ -376,6 +376,10 @@ public:
virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
unsigned Intrinsic) const override;
+ /// getMaximalGlobalOffset - Returns the maximal possible offset which can
+ /// be used for loads / stores from the global.
+ unsigned getMaximalGlobalOffset() const override;
+
protected:
std::pair<const TargetRegisterClass*, uint8_t>
findRepresentativeClass(MVT VT) const;
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=206861&r1=206860&r2=206861&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Mon Apr 21 22:33:26 2014
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/PassManager.h"
#include "llvm/Support/TargetRegistry.h"
+#include "llvm/Transforms/Scalar.h"
using namespace llvm;
@@ -86,11 +87,19 @@ public:
return *getAArch64TargetMachine().getSubtargetImpl();
}
+ bool addPreISel() override;
virtual bool addInstSelector();
virtual bool addPreEmitPass();
};
} // namespace
+bool AArch64PassConfig::addPreISel() {
+ if (TM->getOptLevel() != CodeGenOpt::None)
+ addPass(createGlobalMergePass(TM));
+
+ return false;
+}
+
TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {
return new AArch64PassConfig(this, PM);
}
Added: llvm/trunk/test/CodeGen/AArch64/global_merge_1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/global_merge_1.ll?rev=206861&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/global_merge_1.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/global_merge_1.ll Mon Apr 21 22:33:26 2014
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
+
+ at m = internal global i32 0, align 4
+ at n = internal global i32 0, align 4
+
+define void @f1(i32 %a1, i32 %a2) {
+; CHECK-LABEL: f1:
+; CHECK: adrp x{{[0-9]+}}, _MergedGlobals
+; CHECK-NOT: adrp
+ store i32 %a1, i32* @m, align 4
+ store i32 %a2, i32* @n, align 4
+ ret void
+}
+
+; CHECK: .local _MergedGlobals
+; CHECK: .comm _MergedGlobals,8,8
+
More information about the llvm-commits
mailing list