[llvm] r206838 - [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
Chandler Carruth
chandlerc at gmail.com
Mon Apr 21 19:03:15 PDT 2014
Author: chandlerc
Date: Mon Apr 21 21:03:14 2014
New Revision: 206838
URL: http://llvm.org/viewvc/llvm-project?rev=206838&view=rev
Log:
[cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
system headers above the includes of generated '.inc' files that
actually contain code. In a few targets this was already done pretty
consistently, but it wasn't done *really* consistently anywhere. It is
strictly cleaner IMO and necessary in a bunch of places where the
DEBUG_TYPE is referenced from the generated code. Consistency with the
necessary places trumps. Hopefully the build bots are OK with the
movement of intrin.h...
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.cpp
llvm/trunk/lib/Target/ARM64/ARM64RegisterInfo.cpp
llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp
llvm/trunk/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/R600/AMDGPUInstrInfo.cpp
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
llvm/trunk/lib/Target/R600/R600InstrInfo.cpp
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -28,11 +28,11 @@
#include "llvm/Support/TargetRegistry.h"
#include <algorithm>
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "AArch64GenInstrInfo.inc"
-using namespace llvm;
-
AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI)
: AArch64GenInstrInfo(AArch64::ADJCALLSTACKDOWN, AArch64::ADJCALLSTACKUP),
Subtarget(STI) {}
Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -24,11 +24,11 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "AArch64GenRegisterInfo.inc"
-using namespace llvm;
-
AArch64RegisterInfo::AArch64RegisterInfo()
: AArch64GenRegisterInfo(AArch64::X30) {
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp Mon Apr 21 21:03:14 2014
@@ -19,14 +19,14 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+using namespace llvm;
+
#define DEBUG_TYPE "aarch64-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "AArch64GenSubtargetInfo.inc"
-using namespace llvm;
-
enum AlignMode {
DefaultAlign,
StrictAlign,
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -25,6 +25,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_REGINFO_MC_DESC
#include "AArch64GenRegisterInfo.inc"
@@ -34,8 +36,6 @@
#define GET_SUBTARGETINFO_MC_DESC
#include "AArch64GenSubtargetInfo.inc"
-using namespace llvm;
-
MCSubtargetInfo *AArch64_MC::createAArch64MCSubtargetInfo(StringRef TT,
StringRef CPU,
StringRef FS) {
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -37,13 +37,13 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
-#define GET_INSTRINFO_CTOR_DTOR
-#include "ARMGenInstrInfo.inc"
-
using namespace llvm;
#define DEBUG_TYPE "arm-instrinfo"
+#define GET_INSTRINFO_CTOR_DTOR
+#include "ARMGenInstrInfo.inc"
+
static cl::opt<bool>
EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden,
cl::desc("Enable ARM 2-addr to 3-addr conv"));
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -21,14 +21,14 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define DEBUG_TYPE "arm-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "ARMGenSubtargetInfo.inc"
-using namespace llvm;
-
static cl::opt<bool>
ReserveR9("arm-reserve-r9", cl::Hidden,
cl::desc("Reserve R9, making it unavailable as GPR"));
Modified: llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -23,11 +23,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "ARM64GenInstrInfo.inc"
-using namespace llvm;
-
ARM64InstrInfo::ARM64InstrInfo(const ARM64Subtarget &STI)
: ARM64GenInstrInfo(ARM64::ADJCALLSTACKDOWN, ARM64::ADJCALLSTACKUP),
RI(this, &STI), Subtarget(STI) {}
Modified: llvm/trunk/lib/Target/ARM64/ARM64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64RegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64RegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -27,11 +27,11 @@
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "ARM64GenRegisterInfo.inc"
-using namespace llvm;
-
ARM64RegisterInfo::ARM64RegisterInfo(const ARM64InstrInfo *tii,
const ARM64Subtarget *sti)
: ARM64GenRegisterInfo(ARM64::LR), TII(tii), STI(sti) {}
Modified: llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp Mon Apr 21 21:03:14 2014
@@ -18,14 +18,14 @@
#include "llvm/IR/GlobalValue.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define DEBUG_TYPE "arm64-subtarget"
#define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_TARGET_DESC
#include "ARM64GenSubtargetInfo.inc"
-using namespace llvm;
-
ARM64Subtarget::ARM64Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
: ARM64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
Modified: llvm/trunk/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp Mon Apr 21 21:03:14 2014
@@ -24,6 +24,8 @@
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"
+using namespace llvm;
+
// Pull DecodeStatus and its enum values into the global namespace.
typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
@@ -178,8 +180,6 @@ static DecodeStatus DecodeVecShiftL8Imm(
#include "ARM64GenDisassemblerTables.inc"
#include "ARM64GenInstrInfo.inc"
-using namespace llvm;
-
#define Success llvm::MCDisassembler::Success
#define Fail llvm::MCDisassembler::Fail
Modified: llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -23,6 +23,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "ARM64GenInstrInfo.inc"
@@ -32,8 +34,6 @@
#define GET_REGINFO_MC_DESC
#include "ARM64GenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createARM64MCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitARM64MCInstrInfo(X);
Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -26,15 +26,16 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
-#define GET_INSTRINFO_CTOR_DTOR
-#define GET_INSTRMAP_INFO
-#include "HexagonGenInstrInfo.inc"
-#include "HexagonGenDFAPacketizer.inc"
using namespace llvm;
#define DEBUG_TYPE "hexagon-instrinfo"
+#define GET_INSTRINFO_CTOR_DTOR
+#define GET_INSTRMAP_INFO
+#include "HexagonGenInstrInfo.inc"
+#include "HexagonGenDFAPacketizer.inc"
+
///
/// Constants for Hexagon instructions.
///
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -23,6 +23,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "HexagonGenInstrInfo.inc"
@@ -32,8 +34,6 @@
#define GET_REGINFO_MC_DESC
#include "HexagonGenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createHexagonMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitHexagonMCInstrInfo(X);
Modified: llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -20,6 +20,8 @@
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "MSP430GenInstrInfo.inc"
@@ -29,8 +31,6 @@
#define GET_REGINFO_MC_DESC
#include "MSP430GenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createMSP430MCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitMSP430MCInstrInfo(X);
Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -22,11 +22,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "MSP430GenInstrInfo.inc"
-using namespace llvm;
-
// Pin the vtable to this file.
void MSP430InstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -26,11 +26,11 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "MSP430GenRegisterInfo.inc"
-using namespace llvm;
-
// FIXME: Provide proper call frame setup / destroy opcodes.
MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm)
: MSP430GenRegisterInfo(MSP430::PCW), TM(tm) {
Modified: llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp Mon Apr 21 21:03:14 2014
@@ -15,14 +15,14 @@
#include "MSP430.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define DEBUG_TYPE "msp430-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "MSP430GenSubtargetInfo.inc"
-using namespace llvm;
-
void MSP430Subtarget::anchor() { }
MSP430Subtarget::MSP430Subtarget(const std::string &TT,
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -30,6 +30,8 @@
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "MipsGenInstrInfo.inc"
@@ -39,8 +41,6 @@
#define GET_REGINFO_MC_DESC
#include "MipsGenRegisterInfo.inc"
-using namespace llvm;
-
/// Select the Mips CPU for the given triple and cpu name.
/// FIXME: Merge with the copy in MipsSubtarget.cpp
static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -22,11 +22,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "MipsGenInstrInfo.inc"
-using namespace llvm;
-
// Pin the vtable to this file.
void MipsInstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -37,11 +37,11 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "MipsGenRegisterInfo.inc"
-using namespace llvm;
-
MipsRegisterInfo::MipsRegisterInfo(const MipsSubtarget &ST)
: MipsGenRegisterInfo(Mips::RA), Subtarget(ST) {}
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -25,13 +25,12 @@
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
+using namespace llvm;
+
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "MipsGenSubtargetInfo.inc"
-
-using namespace llvm;
-
// FIXME: Maybe this should be on by default when Mips16 is specified
//
static cl::opt<bool> Mixed16_32(
Modified: llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -20,6 +20,8 @@
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "NVPTXGenInstrInfo.inc"
@@ -29,8 +31,6 @@
#define GET_REGINFO_MC_DESC
#include "NVPTXGenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createNVPTXMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitNVPTXMCInstrInfo(X);
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -14,8 +14,6 @@
#include "NVPTX.h"
#include "NVPTXInstrInfo.h"
#include "NVPTXTargetMachine.h"
-#define GET_INSTRINFO_CTOR_DTOR
-#include "NVPTXGenInstrInfo.inc"
#include "llvm/IR/Function.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineFunction.h"
@@ -24,6 +22,9 @@
using namespace llvm;
+#define GET_INSTRINFO_CTOR_DTOR
+#include "NVPTXGenInstrInfo.inc"
+
// Pin the vtable to this file.
void NVPTXInstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -13,6 +13,8 @@
#include "NVPTXSubtarget.h"
+using namespace llvm;
+
#define DEBUG_TYPE "nvptx-subtarget"
#define GET_SUBTARGETINFO_ENUM
@@ -20,8 +22,6 @@
#define GET_SUBTARGETINFO_CTOR
#include "NVPTXGenSubtargetInfo.inc"
-using namespace llvm;
-
// Pin the vtable to this file.
void NVPTXSubtarget::anchor() {}
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -26,6 +26,8 @@
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "PPCGenInstrInfo.inc"
@@ -35,8 +37,6 @@
#define GET_REGINFO_MC_DESC
#include "PPCGenRegisterInfo.inc"
-using namespace llvm;
-
// Pin the vtable to this file.
PPCTargetStreamer::~PPCTargetStreamer() {}
PPCTargetStreamer::PPCTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -35,14 +35,14 @@
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
-#define GET_INSTRMAP_INFO
-#define GET_INSTRINFO_CTOR_DTOR
-#include "PPCGenInstrInfo.inc"
-
using namespace llvm;
#define DEBUG_TYPE "ppc-instr-info"
+#define GET_INSTRMAP_INFO
+#define GET_INSTRINFO_CTOR_DTOR
+#include "PPCGenInstrInfo.inc"
+
static cl::
opt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden,
cl::desc("Disable analysis for CTR loops"));
Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -42,11 +42,11 @@
#include "llvm/Target/TargetOptions.h"
#include <cstdlib>
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "PPCGenRegisterInfo.inc"
-using namespace llvm;
-
static cl::opt<bool>
EnableBasePointer("ppc-use-base-pointer", cl::Hidden, cl::init(true),
cl::desc("Enable use of a base pointer for complex stack frames"));
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -24,14 +24,14 @@
#include "llvm/Target/TargetMachine.h"
#include <cstdlib>
+using namespace llvm;
+
#define DEBUG_TYPE "ppc-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "PPCGenSubtargetInfo.inc"
-using namespace llvm;
-
PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit,
CodeGenOpt::Level OptLevel)
Modified: llvm/trunk/lib/Target/R600/AMDGPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -20,14 +20,13 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_NAMED_OPS
#define GET_INSTRMAP_INFO
#include "AMDGPUGenInstrInfo.inc"
-using namespace llvm;
-
-
// Pin the vtable to this file.
void AMDGPUInstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -24,6 +24,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "AMDGPUGenInstrInfo.inc"
@@ -33,8 +35,6 @@
#define GET_REGINFO_MC_DESC
#include "AMDGPUGenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createAMDGPUMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitAMDGPUMCInstrInfo(X);
Modified: llvm/trunk/lib/Target/R600/R600InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600InstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600InstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -23,11 +23,11 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "AMDGPUGenDFAPacketizer.inc"
-using namespace llvm;
-
R600InstrInfo::R600InstrInfo(AMDGPUTargetMachine &tm)
: AMDGPUInstrInfo(tm),
RI(tm),
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -22,6 +22,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "SparcGenInstrInfo.inc"
@@ -31,9 +33,6 @@
#define GET_REGINFO_MC_DESC
#include "SparcGenRegisterInfo.inc"
-using namespace llvm;
-
-
static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
StringRef TT) {
MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -24,11 +24,10 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
-#define GET_INSTRINFO_CTOR_DTOR
-#include "SparcGenInstrInfo.inc"
-
using namespace llvm;
+#define GET_INSTRINFO_CTOR_DTOR
+#include "SparcGenInstrInfo.inc"
// Pin the vtable to this file.
void SparcInstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -25,11 +25,11 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetInstrInfo.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "SparcGenRegisterInfo.inc"
-using namespace llvm;
-
static cl::opt<bool>
ReserveAppRegisters("sparc-reserve-app-registers", cl::Hidden, cl::init(false),
cl::desc("Reserve application registers (%g2-%g4)"));
Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -16,14 +16,14 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define DEBUG_TYPE "sparc-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "SparcGenSubtargetInfo.inc"
-using namespace llvm;
-
void SparcSubtarget::anchor() { }
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -16,6 +16,8 @@
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "SystemZGenInstrInfo.inc"
@@ -25,8 +27,6 @@
#define GET_REGINFO_MC_DESC
#include "SystemZGenRegisterInfo.inc"
-using namespace llvm;
-
const unsigned SystemZMC::GR32Regs[16] = {
SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -17,12 +17,12 @@
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRMAP_INFO
#include "SystemZGenInstrInfo.inc"
-using namespace llvm;
-
// Return a mask with Count low bits set.
static uint64_t allOnes(unsigned int Count) {
return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -12,11 +12,11 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "SystemZGenRegisterInfo.inc"
-using namespace llvm;
-
SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm)
: SystemZGenRegisterInfo(SystemZ::R14D), TM(tm) {}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -12,14 +12,14 @@
#include "llvm/IR/GlobalValue.h"
#include "llvm/Support/Host.h"
+using namespace llvm;
+
#define DEBUG_TYPE "systemz-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "SystemZGenSubtargetInfo.inc"
-using namespace llvm;
-
// Pin the vtabel to this file.
void SystemZSubtarget::anchor() {}
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Mon Apr 21 21:03:14 2014
@@ -27,6 +27,11 @@
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
+using namespace llvm;
+using namespace llvm::X86Disassembler;
+
+#define DEBUG_TYPE "x86-disassembler"
+
#define GET_REGINFO_ENUM
#include "X86GenRegisterInfo.inc"
#define GET_INSTRINFO_ENUM
@@ -34,11 +39,6 @@
#define GET_SUBTARGETINFO_ENUM
#include "X86GenSubtargetInfo.inc"
-using namespace llvm;
-using namespace llvm::X86Disassembler;
-
-#define DEBUG_TYPE "x86-disassembler"
-
void llvm::X86Disassembler::Debug(const char *file, unsigned line,
const char *s) {
dbgs() << file << ":" << line << ": " << s;
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -27,6 +27,12 @@
#include "llvm/Support/Host.h"
#include "llvm/Support/TargetRegistry.h"
+#if _MSC_VER
+#include <intrin.h>
+#endif
+
+using namespace llvm;
+
#define GET_REGINFO_MC_DESC
#include "X86GenRegisterInfo.inc"
@@ -36,13 +42,6 @@
#define GET_SUBTARGETINFO_MC_DESC
#include "X86GenSubtargetInfo.inc"
-#if _MSC_VER
-#include <intrin.h>
-#endif
-
-using namespace llvm;
-
-
std::string X86_MC::ParseX86Triple(StringRef TT) {
Triple TheTriple(TT);
std::string FS;
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -36,13 +36,13 @@
#include "llvm/Target/TargetOptions.h"
#include <limits>
+using namespace llvm;
+
#define DEBUG_TYPE "x86-instr-info"
#define GET_INSTRINFO_CTOR_DTOR
#include "X86GenInstrInfo.inc"
-using namespace llvm;
-
static cl::opt<bool>
NoFusing("disable-spill-fusing",
cl::desc("Disable fusing of spill code into instructions"));
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -38,11 +38,11 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+using namespace llvm;
+
#define GET_REGINFO_TARGET_DESC
#include "X86GenRegisterInfo.inc"
-using namespace llvm;
-
cl::opt<bool>
ForceStackAlign("force-align-stack",
cl::desc("Force align the stack to the minimum alignment"
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Mon Apr 21 21:03:14 2014
@@ -24,16 +24,16 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
-#define GET_SUBTARGETINFO_TARGET_DESC
-#define GET_SUBTARGETINFO_CTOR
-#include "X86GenSubtargetInfo.inc"
-
using namespace llvm;
#if defined(_MSC_VER)
#include <intrin.h>
#endif
+#define GET_SUBTARGETINFO_TARGET_DESC
+#define GET_SUBTARGETINFO_CTOR
+#include "X86GenSubtargetInfo.inc"
+
/// ClassifyBlockAddressReference - Classify a blockaddress reference for the
/// current subtarget according to how we should reference it in a non-pcrel
/// context.
Modified: llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp Mon Apr 21 21:03:14 2014
@@ -23,6 +23,8 @@
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_MC_DESC
#include "XCoreGenInstrInfo.inc"
@@ -32,8 +34,6 @@
#define GET_REGINFO_MC_DESC
#include "XCoreGenRegisterInfo.inc"
-using namespace llvm;
-
static MCInstrInfo *createXCoreMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitXCoreMCInstrInfo(X);
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp Mon Apr 21 21:03:14 2014
@@ -26,6 +26,8 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define GET_INSTRINFO_CTOR_DTOR
#include "XCoreGenInstrInfo.inc"
@@ -41,9 +43,6 @@ namespace XCore {
}
}
-using namespace llvm;
-
-
// Pin the vtable to this file.
void XCoreInstrInfo::anchor() {}
Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Mon Apr 21 21:03:14 2014
@@ -33,13 +33,13 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
-#define GET_REGINFO_TARGET_DESC
-#include "XCoreGenRegisterInfo.inc"
-
using namespace llvm;
#define DEBUG_TYPE "xcore-reg-info"
+#define GET_REGINFO_TARGET_DESC
+#include "XCoreGenRegisterInfo.inc"
+
XCoreRegisterInfo::XCoreRegisterInfo()
: XCoreGenRegisterInfo(XCore::LR) {
}
Modified: llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp?rev=206838&r1=206837&r2=206838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp Mon Apr 21 21:03:14 2014
@@ -15,14 +15,14 @@
#include "XCore.h"
#include "llvm/Support/TargetRegistry.h"
+using namespace llvm;
+
#define DEBUG_TYPE "xcore-subtarget"
#define GET_SUBTARGETINFO_TARGET_DESC
#define GET_SUBTARGETINFO_CTOR
#include "XCoreGenSubtargetInfo.inc"
-using namespace llvm;
-
void XCoreSubtarget::anchor() { }
XCoreSubtarget::XCoreSubtarget(const std::string &TT,
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