[PATCH 5/5] R600: Add vector SIN test
Matt Arsenault
arsenm2 at gmail.com
Sun Apr 20 15:10:07 PDT 2014
On Apr 20, 2014, at 1:57 PM, Jan Vesely <jan.vesely at rutgers.edu> wrote:
> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> ---
> test/CodeGen/R600/llvm.sin.ll | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/test/CodeGen/R600/llvm.sin.ll b/test/CodeGen/R600/llvm.sin.ll
> index 9eb9983..3d34d78 100644
> --- a/test/CodeGen/R600/llvm.sin.ll
> +++ b/test/CodeGen/R600/llvm.sin.ll
> @@ -1,5 +1,6 @@
> ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
>
> +;CHECK-LABEL: test
> ;CHECK: MULADD_IEEE *
> ;CHECK: FRACT *
> ;CHECK: ADD *
> @@ -13,7 +14,20 @@ define void @test(<4 x float> inreg %reg0) #0 {
> ret void
> }
>
> +;CHECK-LABEL: testv
> +;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
> +;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
> +;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
> +;CHECK: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
> +
> +define void @testv(<4 x float> inreg %vx) #0 {
> + %vec = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)
> + call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
> + ret void
> +}
> +
> declare float @llvm.sin.f32(float) readnone
> +declare <4 x float> @llvm.sin.v4f32(<4 x float>) readnone
> declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
>
> attributes #0 = { "ShaderType"="0" }
> --
> 1.9.0
These tests should use the EG / SI check prefixes instead of the default CHECK
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