[PATCH][X86] Improve buildFromShuffleMostly for AVX
Quentin Colombet
qcolombet at apple.com
Fri Apr 18 12:30:26 PDT 2014
Hi Adam,
LGTM.
Thanks,
-Quentin
On Apr 18, 2014, at 12:23 PM, Adam Nemet <anemet at apple.com> wrote:
> Quentin looked at this and suggested to be slightly less conservative in detecting the lowered idiom.
>
> In this new version, the idiom is also matched if the extract_vector_elt accesses higher elements beyond the first. I also fixed some formatting issues.
>
> OK to commit?
>
> Adam
>
> On Apr 16, 2014, at 1:03 PM, Adam Nemet <anemet at apple.com> wrote:
>
>> Ping
>>
>> On Apr 7, 2014, at 4:09 PM, Adam Nemet <anemet at apple.com> wrote:
>>
>>> For a 256-bit BUILD_VECTOR consisting mostly of shuffles of 256-bit vectors,
>>> both the BUILD_VECTOR and its operands may need to be legalized in multiple
>>> steps. Consider:
>>>
>>> (v8f32 (BUILD_VECTOR (extract_vector_elt (v8f32 %vreg0,) Constant<1>),
>>> (extract_vector_elt %vreg0, Constant<2>),
>>> (extract_vector_elt %vreg0, Constant<3>),
>>> (extract_vector_elt %vreg0, Constant<4>),
>>> (extract_vector_elt %vreg0, Constant<5>),
>>> (extract_vector_elt %vreg0, Constant<6>),
>>> (extract_vector_elt %vreg0, Constant<7>),
>>> %vreg1))
>>>
>>> a. We can't build a 256-bit vector efficiently so, we need to split it into
>>> two 128-bit vecs and combine them with VINSERTX128.
>>>
>>> b. Operands like (extract_vector_elt (v8f32 %vreg0), Constant<7>) needs to
>>> be split into a VEXTRACTX128 and a further extract_vector_elt from the
>>> resulting 128-bit vector.
>>>
>>> c. The extract_vector_elt from b. is lowered into a shuffle to the first
>>> element and a movss.
>>>
>>> Depending on the order in which we legalize the BUILD_VECTOR and its
>>> operands[1], buildFromShuffleMostly may be faced with:
>>>
>>> (v4f32 (BUILD_VECTOR (extract_vector_elt
>>> (vector_shuffle<1,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
>>> Constant<0>),
>>> (extract_vector_elt
>>> (vector_shuffle<2,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
>>> Constant<0>),
>>> (extract_vector_elt
>>> (vector_shuffle<3,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
>>> Constant<0>),
>>> %vreg1))
>>>
>>> In order to figure out the underlying vector and their identity we need to see
>>> through the shuffles.
>>>
>>> [1] Note that the order in which operations and their operands are legalized is
>>> only guaranteed in the first iteration of LegalizeDAG.
>>>
>>> Fixes <rdar://problem/16296956>
>>>
>>> Adam
>>>
>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> <X86-Improve-buildFromShuffleMostly-for-AVX.patch>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140418/59885a24/attachment.html>
More information about the llvm-commits
mailing list