[PATCH] [AArch64] Implement getMaximumUnrollFactor()

[Jiangning Liu]

Hi Zhaoshi,

As you might have known we are porting AArch64 back-end features to ARM64.
So for new features or new test cases, we need to guarantee they will
definitely be covered by ARM64, otherwise we would have to file a bug
tracker to highlight the missing parts in ARM64.

I know this patch is only a porting from ARM64 to AArch64, but the test
case is a brand new one, so could you please either add this test case to
ARM64 target, or add a new RUN in your test
for -mtriple=arm64-none-linux-gnu?

Thanks,
-Jiangning


2014-04-18 8:49 GMT+08:00 Z. Zheng <zhaoshiz at codeaurora.org>:

>   Rebased, no code change.
>
>   Reviews, I don't have commit access to llvm trunk, please merge it.
> Thanks in advance.
>
> Hi Jiangning, t.p.northover, hfinkel,
>
> http://reviews.llvm.org/D3320
>
> CHANGE SINCE LAST DIFF
>   http://reviews.llvm.org/D3320?vs=8428&id=8617#toc
>
> Files:
>   lib/Target/AArch64/AArch64TargetTransformInfo.cpp
>   test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
>
> Index: lib/Target/AArch64/AArch64TargetTransformInfo.cpp
> ===================================================================
> --- lib/Target/AArch64/AArch64TargetTransformInfo.cpp
> +++ lib/Target/AArch64/AArch64TargetTransformInfo.cpp
> @@ -92,6 +92,7 @@
>      return 64;
>    }
>
> +  unsigned getMaximumUnrollFactor() const override { return 2; }
>    /// @}
>  };
>
> Index: test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
> ===================================================================
> --- /dev/null
> +++ test/Transforms/LoopVectorize/AArch64/aarch64-unroll.ll
> @@ -0,0 +1,42 @@
> +; RUN: opt < %s -loop-vectorize -mtriple=aarch64-none-linux-gnu
> -mattr=+neon -S | FileCheck %s
> +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
> +
> +; Function Attrs: nounwind
> +define i32* @array_add(i32* noalias nocapture readonly %a, i32* noalias
> nocapture readonly %b, i32* %c, i32 %size) {
> +;CHECK-LABEL: array_add
> +;CHECK: load <4 x i32>
> +;CHECK: load <4 x i32>
> +;CHECK: load <4 x i32>
> +;CHECK: load <4 x i32>
> +;CHECK: add nsw <4 x i32>
> +;CHECK: add nsw <4 x i32>
> +;CHECK: store <4 x i32>
> +;CHECK: store <4 x i32>
> +;CHECK: ret
> +entry:
> +  %cmp10 = icmp sgt i32 %size, 0
> +  br i1 %cmp10, label %for.body.preheader, label %for.end
> +
> +for.body.preheader:                               ; preds = %entry
> +  br label %for.body
> +
> +for.body:                                         ; preds =
> %for.body.preheader, %for.body
> +  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0,
> %for.body.preheader ]
> +  %arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv
> +  %0 = load i32* %arrayidx, align 4
> +  %arrayidx2 = getelementptr inbounds i32* %b, i64 %indvars.iv
> +  %1 = load i32* %arrayidx2, align 4
> +  %add = add nsw i32 %1, %0
> +  %arrayidx4 = getelementptr inbounds i32* %c, i64 %indvars.iv
> +  store i32 %add, i32* %arrayidx4, align 4
> +  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
> +  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
> +  %exitcond = icmp eq i32 %lftr.wideiv, %size
> +  br i1 %exitcond, label %for.end.loopexit, label %for.body
> +
> +for.end.loopexit:                                 ; preds = %for.body
> +  br label %for.end
> +
> +for.end:                                          ; preds =
> %for.end.loopexit, %entry
> +  ret i32* %c
> +}
>
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