[PATCH] R600/SI: f64 frint is legal on CI

[Tom Stellard]

On Wed, Apr 16, 2014 at 08:29:34PM -0700, Matt Arsenault wrote:
> http://reviews.llvm.org/D3406
> 
> Files:
>   lib/Target/R600/SIISelLowering.cpp
>   lib/Target/R600/SIInstructions.td
>   test/CodeGen/R600/llvm.rint.f64.ll
>   test/CodeGen/R600/llvm.rint.ll

> Index: lib/Target/R600/SIISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/SIISelLowering.cpp
> +++ lib/Target/R600/SIISelLowering.cpp
> @@ -212,6 +212,7 @@
>      setOperationAction(ISD::FTRUNC, MVT::f64, Legal);
>      setOperationAction(ISD::FCEIL, MVT::f64, Legal);
>      setOperationAction(ISD::FFLOOR, MVT::f64, Legal);
> +    setOperationAction(ISD::FRINT, MVT::f64, Legal);

Is it legal on SI too?

-Tom

>    }
>  
>    setTargetDAGCombine(ISD::SELECT_CC);
> Index: lib/Target/R600/SIInstructions.td
> ===================================================================
> --- lib/Target/R600/SIInstructions.td
> +++ lib/Target/R600/SIInstructions.td
> @@ -2145,7 +2145,9 @@
>    [(set f64:$dst, (ffloor f64:$src0))]
>  >;
>  
> -defm V_RNDNE_F64 : VOP1_64 <0x00000019, "V_RNDNE_F64", []>;
> +defm V_RNDNE_F64 : VOP1_64 <0x00000019, "V_RNDNE_F64",
> +  [(set f64:$dst, (frint f64:$src0))]
> +>;
>  
>  def V_QSAD_PK_U16_U8 : VOP3_32 <0x00000173, "V_QSAD_PK_U16_U8", []>;
>  def V_MQSAD_U16_U8 : VOP3_32 <0x000000172, "V_MQSAD_U16_U8", []>;
> Index: test/CodeGen/R600/llvm.rint.f64.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/llvm.rint.f64.ll
> @@ -0,0 +1,37 @@
> +; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
> +
> +; FUNC-LABEL: @f64
> +; CI: V_RNDNE_F64_e32
> +define void @f64(double addrspace(1)* %out, double %in) {
> +entry:
> +  %0 = call double @llvm.rint.f64(double %in)
> +  store double %0, double addrspace(1)* %out
> +  ret void
> +}
> +
> +; FUNC-LABEL: @v2f64
> +; CI: V_RNDNE_F64_e32
> +; CI: V_RNDNE_F64_e32
> +define void @v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
> +entry:
> +  %0 = call <2 x double> @llvm.rint.v2f64(<2 x double> %in)
> +  store <2 x double> %0, <2 x double> addrspace(1)* %out
> +  ret void
> +}
> +
> +; FUNC-LABEL: @v4f64
> +; CI: V_RNDNE_F64_e32
> +; CI: V_RNDNE_F64_e32
> +; CI: V_RNDNE_F64_e32
> +; CI: V_RNDNE_F64_e32
> +define void @v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
> +entry:
> +  %0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %in)
> +  store <4 x double> %0, <4 x double> addrspace(1)* %out
> +  ret void
> +}
> +
> +
> +declare double @llvm.rint.f64(double) #0
> +declare <2 x double> @llvm.rint.v2f64(<2 x double>) #0
> +declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0
> Index: test/CodeGen/R600/llvm.rint.ll
> ===================================================================
> --- test/CodeGen/R600/llvm.rint.ll
> +++ test/CodeGen/R600/llvm.rint.ll
> @@ -1,10 +1,10 @@
> -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
> -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
> +; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
> +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
>  
> -; R600-CHECK: @f32
> -; R600-CHECK: RNDNE
> -; SI-CHECK: @f32
> -; SI-CHECK: V_RNDNE_F32_e32
> +; FUNC-LABEL: @f32
> +; R600: RNDNE
> +
> +; SI: V_RNDNE_F32_e32
>  define void @f32(float addrspace(1)* %out, float %in) {
>  entry:
>    %0 = call float @llvm.rint.f32(float %in)
> @@ -12,12 +12,12 @@
>    ret void
>  }
>  
> -; R600-CHECK: @v2f32
> -; R600-CHECK: RNDNE
> -; R600-CHECK: RNDNE
> -; SI-CHECK: @v2f32
> -; SI-CHECK: V_RNDNE_F32_e32
> -; SI-CHECK: V_RNDNE_F32_e32
> +; FUNC-LABEL: @v2f32
> +; R600: RNDNE
> +; R600: RNDNE
> +
> +; SI: V_RNDNE_F32_e32
> +; SI: V_RNDNE_F32_e32
>  define void @v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
>  entry:
>    %0 = call <2 x float> @llvm.rint.v2f32(<2 x float> %in)
> @@ -25,16 +25,16 @@
>    ret void
>  }
>  
> -; R600-CHECK: @v4f32
> -; R600-CHECK: RNDNE
> -; R600-CHECK: RNDNE
> -; R600-CHECK: RNDNE
> -; R600-CHECK: RNDNE
> -; SI-CHECK: @v4f32
> -; SI-CHECK: V_RNDNE_F32_e32
> -; SI-CHECK: V_RNDNE_F32_e32
> -; SI-CHECK: V_RNDNE_F32_e32
> -; SI-CHECK: V_RNDNE_F32_e32
> +; FUNC-LABEL: @v4f32
> +; R600: RNDNE
> +; R600: RNDNE
> +; R600: RNDNE
> +; R600: RNDNE
> +
> +; SI: V_RNDNE_F32_e32
> +; SI: V_RNDNE_F32_e32
> +; SI: V_RNDNE_F32_e32
> +; SI: V_RNDNE_F32_e32
>  define void @v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
>  entry:
>    %0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %in)
> @@ -42,13 +42,8 @@
>    ret void
>  }
>  
> -; Function Attrs: nounwind readonly
>  declare float @llvm.rint.f32(float) #0
> -
> -; Function Attrs: nounwind readonly
>  declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0
> -
> -; Function Attrs: nounwind readonly
>  declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0
>  
>  attributes #0 = { nounwind readonly }

> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits