[llvm] r206357 - Convert SelectionDAG::getVTList to use ArrayRef
Craig Topper
craig.topper at gmail.com
Tue Apr 15 23:10:52 PDT 2014
Author: ctopper
Date: Wed Apr 16 01:10:51 2014
New Revision: 206357
URL: http://llvm.org/viewvc/llvm-project?rev=206357&view=rev
Log:
Convert SelectionDAG::getVTList to use ArrayRef
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/trunk/lib/Target/R600/SIISelLowering.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Wed Apr 16 01:10:51 2014
@@ -392,7 +392,7 @@ public:
SDVTList getVTList(EVT VT1, EVT VT2);
SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
- SDVTList getVTList(const EVT *VTs, unsigned NumVTs);
+ SDVTList getVTList(ArrayRef<EVT> VTs);
//===--------------------------------------------------------------------===//
// Node creation methods.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Apr 16 01:10:51 2014
@@ -432,7 +432,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_
EVT ValueVTs[] = { N->getValueType(0), NVT };
SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
SDValue Res = DAG.getNode(N->getOpcode(), SDLoc(N),
- DAG.getVTList(ValueVTs, 2), Ops, 2);
+ DAG.getVTList(ValueVTs), Ops, 2);
// Modified the sum result - switch anything that used the old sum to use
// the new one.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Wed Apr 16 01:10:51 2014
@@ -142,7 +142,7 @@ static void CloneNodeWithValues(SDNode *
if (ExtraOper.getNode())
Ops.push_back(ExtraOper);
- SDVTList VTList = DAG->getVTList(&VTs[0], VTs.size());
+ SDVTList VTList = DAG->getVTList(VTs);
MachineSDNode::mmo_iterator Begin = nullptr, End = nullptr;
MachineSDNode *MN = dyn_cast<MachineSDNode>(N);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Apr 16 01:10:51 2014
@@ -4409,7 +4409,7 @@ SDValue SelectionDAG::getMergeValues(con
VTs.reserve(NumOps);
for (unsigned i = 0; i < NumOps; ++i)
VTs.push_back(Ops[i].getValueType());
- return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
+ return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs),
Ops, NumOps);
}
@@ -4889,7 +4889,7 @@ SDValue SelectionDAG::getNode(unsigned O
SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
ArrayRef<EVT> ResultTys,
const SDValue *Ops, unsigned NumOps) {
- return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
+ return getNode(Opcode, DL, getVTList(ResultTys),
Ops, NumOps);
}
@@ -5078,7 +5078,8 @@ SDVTList SelectionDAG::getVTList(EVT VT1
return Result->getSDVTList();
}
-SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
+SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
+ unsigned NumVTs = VTs.size();
FoldingSetNodeID ID;
ID.AddInteger(NumVTs);
for (unsigned index = 0; index < NumVTs; index++) {
@@ -5089,7 +5090,7 @@ SDVTList SelectionDAG::getVTList(const E
SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
if (!Result) {
EVT *Array = Allocator.Allocate<EVT>(NumVTs);
- std::copy(VTs, VTs + NumVTs, Array);
+ std::copy(VTs.begin(), VTs.end(), Array);
Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
VTListMap.InsertNode(Result, IP);
}
@@ -5560,7 +5561,7 @@ MachineSDNode *
SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
ArrayRef<EVT> ResultTys,
ArrayRef<SDValue> Ops) {
- SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
+ SDVTList VTs = getVTList(ResultTys);
return getMachineNode(Opcode, dl, VTs, Ops);
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 16 01:10:51 2014
@@ -753,7 +753,7 @@ SDValue RegsForValue::getCopyFromRegs(Se
}
return DAG.getNode(ISD::MERGE_VALUES, dl,
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ DAG.getVTList(ValueVTs),
&Values[0], ValueVTs.size());
}
@@ -2059,7 +2059,7 @@ void SelectionDAGBuilder::visitLandingPa
// Merge into one.
SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ DAG.getVTList(ValueVTs),
&Ops[0], 2);
setValue(&LP, Res);
}
@@ -2887,7 +2887,7 @@ void SelectionDAGBuilder::visitSelect(co
FalseVal.getResNo() + i));
setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&ValueVTs[0], NumValues),
+ DAG.getVTList(ValueVTs),
&Values[0], NumValues));
}
@@ -3262,7 +3262,7 @@ void SelectionDAGBuilder::visitInsertVal
SDValue(Agg.getNode(), Agg.getResNo() + i);
setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&AggValueVTs[0], NumAggValues),
+ DAG.getVTList(AggValueVTs),
&Values[0], NumAggValues));
}
@@ -3297,7 +3297,7 @@ void SelectionDAGBuilder::visitExtractVa
SDValue(Agg.getNode(), Agg.getResNo() + i);
setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&ValValueVTs[0], NumValValues),
+ DAG.getVTList(ValValueVTs),
&Values[0], NumValValues));
}
@@ -3511,7 +3511,7 @@ void SelectionDAGBuilder::visitLoad(cons
}
setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&ValueVTs[0], NumValues),
+ DAG.getVTList(ValueVTs),
&Values[0], NumValues));
}
@@ -3796,7 +3796,7 @@ void SelectionDAGBuilder::visitTargetInt
if (HasChain)
ValueVTs.push_back(MVT::Other);
- SDVTList VTs = DAG.getVTList(ValueVTs.data(), ValueVTs.size());
+ SDVTList VTs = DAG.getVTList(ValueVTs);
// Create the node.
SDValue Result;
@@ -5550,7 +5550,7 @@ void SelectionDAGBuilder::LowerCallTo(Im
setValue(CS.getInstruction(),
DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
- DAG.getVTList(&RetTys[0], RetTys.size()),
+ DAG.getVTList(RetTys),
&Values[0], Values.size()));
}
@@ -7064,7 +7064,7 @@ void SelectionDAGBuilder::visitPatchpoin
// There is always a chain and a glue type at the end
ValueVTs.push_back(MVT::Other);
ValueVTs.push_back(MVT::Glue);
- NodeTys = DAG.getVTList(ValueVTs.data(), ValueVTs.size());
+ NodeTys = DAG.getVTList(ValueVTs);
} else
NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
@@ -7281,7 +7281,7 @@ TargetLowering::LowerCallTo(TargetLoweri
return std::make_pair(SDValue(), CLI.Chain);
SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL,
- CLI.DAG.getVTList(&RetTys[0], RetTys.size()),
+ CLI.DAG.getVTList(RetTys),
&ReturnValues[0], ReturnValues.size());
return std::make_pair(Res, CLI.Chain);
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 16 01:10:51 2014
@@ -2922,7 +2922,7 @@ SelectCodeCommon(SDNode *NodeToMatch, co
else if (VTs.size() == 2)
VTList = CurDAG->getVTList(VTs[0], VTs[1]);
else
- VTList = CurDAG->getVTList(VTs.data(), VTs.size());
+ VTList = CurDAG->getVTList(VTs);
// Get the operand list.
unsigned NumOps = MatcherTable[MatcherIndex++];
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Wed Apr 16 01:10:51 2014
@@ -4178,7 +4178,7 @@ static SDValue CombineBaseUpdate(SDNode
Tys[n] = VecTy;
Tys[n++] = MVT::i64;
Tys[n] = MVT::Other;
- SDVTList SDTys = DAG.getVTList(Tys, NumResultVecs + 2);
+ SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumResultVecs + 2));
SmallVector<SDValue, 8> Ops;
Ops.push_back(N->getOperand(0)); // incoming chain
Ops.push_back(N->getOperand(AddrOpIdx));
@@ -4254,7 +4254,7 @@ static SDValue CombineVLDDUP(SDNode *N,
for (n = 0; n < NumVecs; ++n)
Tys[n] = VT;
Tys[n] = MVT::Other;
- SDVTList SDTys = DAG.getVTList(Tys, NumVecs + 1);
+ SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumVecs + 1));
SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) };
MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD);
SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, Ops, 2,
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 16 01:10:51 2014
@@ -8666,7 +8666,7 @@ static SDValue CombineBaseUpdate(SDNode
Tys[n] = VecTy;
Tys[n++] = MVT::i32;
Tys[n] = MVT::Other;
- SDVTList SDTys = DAG.getVTList(Tys, NumResultVecs+2);
+ SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumResultVecs+2));
SmallVector<SDValue, 8> Ops;
Ops.push_back(N->getOperand(0)); // incoming chain
Ops.push_back(N->getOperand(AddrOpIdx));
@@ -8746,7 +8746,7 @@ static bool CombineVLDDUP(SDNode *N, Tar
for (n = 0; n < NumVecs; ++n)
Tys[n] = VT;
Tys[n] = MVT::Other;
- SDVTList SDTys = DAG.getVTList(Tys, NumVecs+1);
+ SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumVecs+1));
SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) };
MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD);
SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys,
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp Wed Apr 16 01:10:51 2014
@@ -2187,7 +2187,7 @@ SDNode *NVPTXDAGToDAGISel::SelectLoadPar
VTs = CurDAG->getVTList(EltVT, EltVT, MVT::Other, MVT::Glue);
} else {
EVT EVTs[] = { EltVT, EltVT, EltVT, EltVT, MVT::Other, MVT::Glue };
- VTs = CurDAG->getVTList(&EVTs[0], array_lengthof(EVTs));
+ VTs = CurDAG->getVTList(EVTs);
}
unsigned OffsetVal = cast<ConstantSDNode>(Offset)->getZExtValue();
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp Wed Apr 16 01:10:51 2014
@@ -1089,7 +1089,7 @@ SDValue NVPTXTargetLowering::LowerCall(T
LoadRetOps.push_back(InFlag);
SDValue retval = DAG.getMemIntrinsicNode(
NVPTXISD::LoadParam, dl,
- DAG.getVTList(&LoadRetVTs[0], LoadRetVTs.size()), &LoadRetOps[0],
+ DAG.getVTList(LoadRetVTs), &LoadRetOps[0],
LoadRetOps.size(), EltVT, MachinePointerInfo());
Chain = retval.getValue(1);
InFlag = retval.getValue(2);
@@ -1119,7 +1119,7 @@ SDValue NVPTXTargetLowering::LowerCall(T
LoadRetOps.push_back(InFlag);
SDValue retval = DAG.getMemIntrinsicNode(
NVPTXISD::LoadParamV2, dl,
- DAG.getVTList(&LoadRetVTs[0], LoadRetVTs.size()), &LoadRetOps[0],
+ DAG.getVTList(LoadRetVTs), &LoadRetOps[0],
LoadRetOps.size(), EltVT, MachinePointerInfo());
Chain = retval.getValue(2);
InFlag = retval.getValue(3);
@@ -1164,7 +1164,7 @@ SDValue NVPTXTargetLowering::LowerCall(T
LoadRetOps.push_back(DAG.getConstant(Ofst, MVT::i32));
LoadRetOps.push_back(InFlag);
SDValue retval = DAG.getMemIntrinsicNode(
- Opc, dl, DAG.getVTList(&LoadRetVTs[0], LoadRetVTs.size()),
+ Opc, dl, DAG.getVTList(LoadRetVTs),
&LoadRetOps[0], LoadRetOps.size(), EltVT, MachinePointerInfo());
if (VecSize == 2) {
Chain = retval.getValue(2);
@@ -1220,7 +1220,7 @@ SDValue NVPTXTargetLowering::LowerCall(T
LoadRetOps.push_back(InFlag);
SDValue retval = DAG.getMemIntrinsicNode(
NVPTXISD::LoadParam, dl,
- DAG.getVTList(&LoadRetVTs[0], LoadRetVTs.size()), &LoadRetOps[0],
+ DAG.getVTList(LoadRetVTs), &LoadRetOps[0],
LoadRetOps.size(), TheLoadType, MachinePointerInfo());
Chain = retval.getValue(1);
InFlag = retval.getValue(2);
@@ -2529,7 +2529,7 @@ static void ReplaceLoadVector(SDNode *N,
case 4: {
Opcode = NVPTXISD::LoadV4;
EVT ListVTs[] = { EltVT, EltVT, EltVT, EltVT, MVT::Other };
- LdResVTs = DAG.getVTList(ListVTs, 5);
+ LdResVTs = DAG.getVTList(ListVTs);
break;
}
}
@@ -2642,7 +2642,7 @@ static void ReplaceINTRINSIC_W_CHAIN(SDN
break;
}
EVT ListVTs[] = { EltVT, EltVT, EltVT, EltVT, MVT::Other };
- LdResVTs = DAG.getVTList(ListVTs, 5);
+ LdResVTs = DAG.getVTList(ListVTs);
break;
}
}
Modified: llvm/trunk/lib/Target/R600/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIISelLowering.cpp?rev=206357&r1=206356&r2=206357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIISelLowering.cpp Wed Apr 16 01:10:51 2014
@@ -719,7 +719,7 @@ SDValue SITargetLowering::LowerBRCOND(SD
// build the new intrinsic call
SDNode *Result = DAG.getNode(
Res.size() > 1 ? ISD::INTRINSIC_W_CHAIN : ISD::INTRINSIC_VOID, DL,
- DAG.getVTList(Res.data(), Res.size()), Ops.data(), Ops.size()).getNode();
+ DAG.getVTList(Res), Ops.data(), Ops.size()).getNode();
if (BR) {
// Give the branch instruction our target
More information about the llvm-commits
mailing list