[PATCH] R600/SI: Print code size along with used register

[Tom Stellard]

On Tue, Apr 15, 2014 at 03:15:39PM -0700, Matt Arsenault wrote:
> Only prints it in the comment. Doesn't emit the value in the binary since I don't know what to do for that
> 
> http://reviews.llvm.org/D3388
> 
> Files:
>   lib/Target/R600/AMDGPUAsmPrinter.cpp
>   lib/Target/R600/AMDGPUAsmPrinter.h
> 
> Index: lib/Target/R600/AMDGPUAsmPrinter.cpp
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.cpp
> +++ lib/Target/R600/AMDGPUAsmPrinter.cpp
> @@ -64,7 +64,7 @@
>    const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
>    SIProgramInfo KernelInfo;
>    if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> -    findNumUsedRegistersSI(MF, KernelInfo.NumSGPR, KernelInfo.NumVGPR);
> +    getSIProgramInfo(KernelInfo, MF);
>      EmitProgramInfoSI(MF, KernelInfo);
>    } else {
>      EmitProgramInfoR600(MF);
> @@ -84,8 +84,10 @@
>                                SectionKind::getReadOnly());
>      OutStreamer.SwitchSection(CommentSection);
>  
> -    if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> +    if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
>        OutStreamer.emitRawComment(" Kernel info:", false);
> +      OutStreamer.emitRawComment(" codeLenInByte = " + Twine(KernelInfo.CodeLen),
> +                                 false);
>        OutStreamer.emitRawComment(" NumSgprs: " + Twine(KernelInfo.NumSGPR),
>                                   false);
>        OutStreamer.emitRawComment(" NumVgprs: " + Twine(KernelInfo.NumVGPR),
> @@ -184,9 +186,9 @@
>    }
>  }
>  
> -void AMDGPUAsmPrinter::findNumUsedRegistersSI(MachineFunction &MF,
> -                                              unsigned &NumSGPR,
> -                                              unsigned &NumVGPR) const {
> +void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
> +                                        MachineFunction &MF) const {
> +  uint64_t CodeSize = 0;
>    unsigned MaxSGPR = 0;
>    unsigned MaxVGPR = 0;
>    bool VCCUsed = false;
> @@ -200,6 +202,9 @@
>                                                      I != E; ++I) {
>        MachineInstr &MI = *I;
>  
> +      // TODO: CodeSize should account for multiple functions.
> +      CodeSize += MI.getDesc().Size;
> +
>        unsigned numOperands = MI.getNumOperands();
>        for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
>          MachineOperand &MO = MI.getOperand(op_idx);
> @@ -274,13 +279,9 @@
>    if (VCCUsed)
>      MaxSGPR += 2;
>  
> -  NumSGPR = MaxSGPR;
> -  NumVGPR = MaxVGPR;
> -}
> -
> -void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &Out,
> -                                        MachineFunction &MF) const {
> -  findNumUsedRegistersSI(MF, Out.NumSGPR, Out.NumVGPR);
> +  ProgInfo.CodeLen = CodeSize;
> +  ProgInfo.NumSGPR = MaxSGPR;
> +  ProgInfo.NumVGPR = MaxVGPR;
>  }
>  
>  void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
> @@ -298,6 +299,8 @@
>    }
>  
>    OutStreamer.EmitIntValue(RsrcReg, 4);
> +
> +  // TODO: Emit code size.

This isn't necessary.  Otherwise, LGTM.

-Tom

>    OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) |
>                             S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4);
>  
> Index: lib/Target/R600/AMDGPUAsmPrinter.h
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.h
> +++ lib/Target/R600/AMDGPUAsmPrinter.h
> @@ -24,7 +24,12 @@
>  class AMDGPUAsmPrinter : public AsmPrinter {
>  private:
>    struct SIProgramInfo {
> -    SIProgramInfo() : NumSGPR(0), NumVGPR(0) {}
> +    SIProgramInfo() :
> +      CodeLen(0),
> +      NumSGPR(0),
> +      NumVGPR(0) {}
> +
> +    uint64_t CodeLen;
>      unsigned NumSGPR;
>      unsigned NumVGPR;
>    };

> Index: lib/Target/R600/AMDGPUAsmPrinter.cpp
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.cpp
> +++ lib/Target/R600/AMDGPUAsmPrinter.cpp
> @@ -64,7 +64,7 @@
>    const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
>    SIProgramInfo KernelInfo;
>    if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> -    findNumUsedRegistersSI(MF, KernelInfo.NumSGPR, KernelInfo.NumVGPR);
> +    getSIProgramInfo(KernelInfo, MF);
>      EmitProgramInfoSI(MF, KernelInfo);
>    } else {
>      EmitProgramInfoR600(MF);
> @@ -84,8 +84,10 @@
>                                SectionKind::getReadOnly());
>      OutStreamer.SwitchSection(CommentSection);
>  
> -    if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> +    if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
>        OutStreamer.emitRawComment(" Kernel info:", false);
> +      OutStreamer.emitRawComment(" codeLenInByte = " + Twine(KernelInfo.CodeLen),
> +                                 false);
>        OutStreamer.emitRawComment(" NumSgprs: " + Twine(KernelInfo.NumSGPR),
>                                   false);
>        OutStreamer.emitRawComment(" NumVgprs: " + Twine(KernelInfo.NumVGPR),
> @@ -184,9 +186,9 @@
>    }
>  }
>  
> -void AMDGPUAsmPrinter::findNumUsedRegistersSI(MachineFunction &MF,
> -                                              unsigned &NumSGPR,
> -                                              unsigned &NumVGPR) const {
> +void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
> +                                        MachineFunction &MF) const {
> +  uint64_t CodeSize = 0;
>    unsigned MaxSGPR = 0;
>    unsigned MaxVGPR = 0;
>    bool VCCUsed = false;
> @@ -200,6 +202,9 @@
>                                                      I != E; ++I) {
>        MachineInstr &MI = *I;
>  
> +      // TODO: CodeSize should account for multiple functions.
> +      CodeSize += MI.getDesc().Size;
> +
>        unsigned numOperands = MI.getNumOperands();
>        for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
>          MachineOperand &MO = MI.getOperand(op_idx);
> @@ -274,13 +279,9 @@
>    if (VCCUsed)
>      MaxSGPR += 2;
>  
> -  NumSGPR = MaxSGPR;
> -  NumVGPR = MaxVGPR;
> -}
> -
> -void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &Out,
> -                                        MachineFunction &MF) const {
> -  findNumUsedRegistersSI(MF, Out.NumSGPR, Out.NumVGPR);
> +  ProgInfo.CodeLen = CodeSize;
> +  ProgInfo.NumSGPR = MaxSGPR;
> +  ProgInfo.NumVGPR = MaxVGPR;
>  }
>  
>  void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
> @@ -298,6 +299,8 @@
>    }
>  
>    OutStreamer.EmitIntValue(RsrcReg, 4);
> +
> +  // TODO: Emit code size.
>    OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) |
>                             S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4);
>  
> Index: lib/Target/R600/AMDGPUAsmPrinter.h
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.h
> +++ lib/Target/R600/AMDGPUAsmPrinter.h
> @@ -24,7 +24,12 @@
>  class AMDGPUAsmPrinter : public AsmPrinter {
>  private:
>    struct SIProgramInfo {
> -    SIProgramInfo() : NumSGPR(0), NumVGPR(0) {}
> +    SIProgramInfo() :
> +      CodeLen(0),
> +      NumSGPR(0),
> +      NumVGPR(0) {}
> +
> +    uint64_t CodeLen;
>      unsigned NumSGPR;
>      unsigned NumVGPR;
>    };

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