[llvm] r206313 - [ARM64] Set default CPU to generic instead of cyclone.
Quentin Colombet
qcolombet at apple.com
Tue Apr 15 12:08:47 PDT 2014
Author: qcolombet
Date: Tue Apr 15 14:08:46 2014
New Revision: 206313
URL: http://llvm.org/viewvc/llvm-project?rev=206313&view=rev
Log:
[ARM64] Set default CPU to generic instead of cyclone.
Modified:
llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp
llvm/trunk/test/CodeGen/AArch64/cond-sel.ll
llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll
llvm/trunk/test/CodeGen/AArch64/floatdp_2source.ll
llvm/trunk/test/CodeGen/AArch64/fp-cond-sel.ll
llvm/trunk/test/CodeGen/AArch64/fp128.ll
llvm/trunk/test/CodeGen/AArch64/literal_pools_float.ll
llvm/trunk/test/CodeGen/ARM64/addp.ll
llvm/trunk/test/CodeGen/ARM64/arith-saturating.ll
llvm/trunk/test/CodeGen/ARM64/atomic-128.ll
llvm/trunk/test/CodeGen/ARM64/atomic.ll
llvm/trunk/test/CodeGen/ARM64/elf-globals.ll
llvm/trunk/test/CodeGen/ARM64/fast-isel-br.ll
llvm/trunk/test/CodeGen/ARM64/fast-isel-conversion.ll
llvm/trunk/test/CodeGen/ARM64/fp128.ll
llvm/trunk/test/CodeGen/ARM64/patchpoint.ll
llvm/trunk/test/CodeGen/ARM64/promote-const.ll
llvm/trunk/test/CodeGen/ARM64/rounding.ll
llvm/trunk/test/CodeGen/ARM64/simd-scalar-to-vector.ll
llvm/trunk/test/CodeGen/ARM64/stp.ll
llvm/trunk/test/CodeGen/ARM64/stur.ll
llvm/trunk/test/CodeGen/ARM64/vaddv.ll
llvm/trunk/test/CodeGen/ARM64/vecCmpBr.ll
llvm/trunk/test/CodeGen/ARM64/vshr.ll
llvm/trunk/test/CodeGen/ARM64/vshuffle.ll
Modified: llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64Subtarget.cpp Tue Apr 15 14:08:46 2014
@@ -32,10 +32,8 @@ ARM64Subtarget::ARM64Subtarget(const std
CPUString(CPU), TargetTriple(TT) {
// Determine default and user-specified characteristics
- // FIXME: Make this darwin-only.
if (CPUString.empty())
- // We default to Cyclone for now, on Darwin.
- CPUString = "cyclone";
+ CPUString = "generic";
ParseSubtargetFeatures(CPUString, FS);
}
Modified: llvm/trunk/test/CodeGen/AArch64/cond-sel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cond-sel.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/cond-sel.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/cond-sel.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
-; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
+; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -mcpu=cyclone | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
@var32 = global i32 0
Modified: llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/eliminate-trunc.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK-AARCH64
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-apple-ios7.0 | FileCheck %s --check-prefix=CHECK-ARM64
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-apple-ios7.0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-ARM64
; Check trunc i64 operation is translated as a subregister access
; eliminating an i32 induction varible.
Modified: llvm/trunk/test/CodeGen/AArch64/floatdp_2source.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/floatdp_2source.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/floatdp_2source.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/floatdp_2source.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-linux-gnu | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-linux-gnu -mcpu=cyclone | FileCheck %s
@varfloat = global float 0.0
@vardouble = global double 0.0
Modified: llvm/trunk/test/CodeGen/AArch64/fp-cond-sel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fp-cond-sel.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fp-cond-sel.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fp-cond-sel.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu -mcpu=cyclone | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
@varfloat = global float 0.0
@vardouble = global double 0.0
Modified: llvm/trunk/test/CodeGen/AArch64/fp128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fp128.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fp128.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fp128.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
-; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
+; RUN: llc -mtriple=arm64-none-linux-gnu -mcpu=cyclone -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
@lhs = global fp128 zeroinitializer
@rhs = global fp128 zeroinitializer
Modified: llvm/trunk/test/CodeGen/AArch64/literal_pools_float.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/literal_pools_float.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/literal_pools_float.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/literal_pools_float.ll Tue Apr 15 14:08:46 2014
@@ -2,8 +2,8 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -code-model=large | FileCheck --check-prefix=CHECK-LARGE %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -code-model=large -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP-LARGE %s
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu | FileCheck %s
-; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu -code-model=large | FileCheck --check-prefix=CHECK-LARGE %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu -mcpu=cyclone | FileCheck %s
+; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-none-linux-gnu -code-model=large -mcpu=cyclone | FileCheck --check-prefix=CHECK-LARGE %s
@varfloat = global float 0.0
@vardouble = global double 0.0
Modified: llvm/trunk/test/CodeGen/ARM64/addp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/addp.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/addp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/addp.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
define double @foo(<2 x double> %a) nounwind {
; CHECK-LABEL: foo:
Modified: llvm/trunk/test/CodeGen/ARM64/arith-saturating.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/arith-saturating.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/arith-saturating.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/arith-saturating.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 | FileCheck %s
+; RUN: llc < %s -march=arm64 -mcpu=cyclone | FileCheck %s
define i32 @qadds(<4 x i32> %b, <4 x i32> %c) nounwind readnone optsize ssp {
; CHECK-LABEL: qadds:
Modified: llvm/trunk/test/CodeGen/ARM64/atomic-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/atomic-128.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/atomic-128.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/atomic-128.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 -mtriple=arm64-linux-gnu -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=arm64 -mtriple=arm64-linux-gnu -verify-machineinstrs -mcpu=cyclone | FileCheck %s
@var = global i128 0
Modified: llvm/trunk/test/CodeGen/ARM64/atomic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/atomic.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/atomic.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/atomic.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=arm64 -verify-machineinstrs -mcpu=cyclone | FileCheck %s
define i32 @val_compare_and_swap(i32* %p) {
; CHECK-LABEL: val_compare_and_swap:
Modified: llvm/trunk/test/CodeGen/ARM64/elf-globals.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/elf-globals.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/elf-globals.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/elf-globals.ll Tue Apr 15 14:08:46 2014
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
-; RUN: llc -mtriple=arm64-linux-gnu -o - %s -O0 | FileCheck %s --check-prefix=CHECK-FAST
-; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic -o - %s | FileCheck %s --check-prefix=CHECK-PIC
-; RUN: llc -mtriple=arm64-linux-gnu -O0 -relocation-model=pic -o - %s | FileCheck %s --check-prefix=CHECK-FAST-PIC
+; RUN: llc -mtriple=arm64-linux-gnu -o - %s -mcpu=cyclone | FileCheck %s
+; RUN: llc -mtriple=arm64-linux-gnu -o - %s -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
+; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC
+; RUN: llc -mtriple=arm64-linux-gnu -O0 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
@var8 = external global i8, align 1
@var16 = external global i16, align 2
Modified: llvm/trunk/test/CodeGen/ARM64/fast-isel-br.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/fast-isel-br.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/fast-isel-br.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/fast-isel-br.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone | FileCheck %s
define void @branch1() nounwind uwtable ssp {
%x = alloca i32, align 4
Modified: llvm/trunk/test/CodeGen/ARM64/fast-isel-conversion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/fast-isel-conversion.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/fast-isel-conversion.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/fast-isel-conversion.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone | FileCheck %s
;; Test various conversions.
define zeroext i32 @trunc_(i8 zeroext %a, i16 zeroext %b, i32 %c, i64 %d) nounwind ssp {
Modified: llvm/trunk/test/CodeGen/ARM64/fp128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/fp128.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/fp128.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/fp128.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm64-linux-gnu -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=arm64-linux-gnu -verify-machineinstrs -mcpu=cyclone < %s | FileCheck %s
@lhs = global fp128 zeroinitializer, align 16
@rhs = global fp128 zeroinitializer, align 16
Modified: llvm/trunk/test/CodeGen/ARM64/patchpoint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/patchpoint.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/patchpoint.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/patchpoint.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=0 | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone | FileCheck %s
; Trivial patchpoint codegen
;
Modified: llvm/trunk/test/CodeGen/ARM64/promote-const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/promote-const.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/promote-const.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/promote-const.ll Tue Apr 15 14:08:46 2014
@@ -1,9 +1,9 @@
; Disable machine cse to stress the different path of the algorithm.
; Otherwise, we always fall in the simple case, i.e., only one definition.
-; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -arm64-stress-promote-const | FileCheck -check-prefix=PROMOTED %s
+; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -arm64-stress-promote-const -mcpu=cyclone | FileCheck -check-prefix=PROMOTED %s
; The REGULAR run just checks that the inputs passed to promote const expose
; the appropriate patterns.
-; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -arm64-promote-const=false | FileCheck -check-prefix=REGULAR %s
+; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -arm64-promote-const=false -mcpu=cyclone | FileCheck -check-prefix=REGULAR %s
%struct.uint8x16x4_t = type { [4 x <16 x i8>] }
Modified: llvm/trunk/test/CodeGen/ARM64/rounding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/rounding.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/rounding.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/rounding.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc -O3 < %s | FileCheck %s
+; RUN: llc -O3 < %s -mcpu=cyclone | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64"
target triple = "arm64-apple-ios6.0.0"
Modified: llvm/trunk/test/CodeGen/ARM64/simd-scalar-to-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/simd-scalar-to-vector.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/simd-scalar-to-vector.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/simd-scalar-to-vector.ll Tue Apr 15 14:08:46 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -O0 | FileCheck %s --check-prefix=CHECK-FAST
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp {
; CHECK: uaddlv.16b h0, v0
Modified: llvm/trunk/test/CodeGen/ARM64/stp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/stp.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/stp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/stp.ll Tue Apr 15 14:08:46 2014
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=arm64 -arm64-stp-suppress=false -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=arm64 -arm64-stp-suppress=false -verify-machineinstrs -mcpu=cyclone | FileCheck %s
; RUN: llc < %s -march=arm64 -arm64-unscaled-mem-op=true\
-; RUN: -verify-machineinstrs | FileCheck -check-prefix=STUR_CHK %s
+; RUN: -verify-machineinstrs -mcpu=cyclone | FileCheck -check-prefix=STUR_CHK %s
; CHECK: stp_int
; CHECK: stp w0, w1, [x2]
Modified: llvm/trunk/test/CodeGen/ARM64/stur.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/stur.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/stur.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/stur.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
%struct.X = type <{ i32, i64, i64 }>
define void @foo1(i32* %p, i64 %val) nounwind {
Modified: llvm/trunk/test/CodeGen/ARM64/vaddv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/vaddv.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/vaddv.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/vaddv.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s | FileCheck %s
+; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s -mcpu=cyclone | FileCheck %s
define signext i8 @test_vaddv_s8(<8 x i8> %a1) {
; CHECK-LABEL: test_vaddv_s8:
Modified: llvm/trunk/test/CodeGen/ARM64/vecCmpBr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/vecCmpBr.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/vecCmpBr.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/vecCmpBr.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s | FileCheck %s
+; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s -mcpu=cyclone | FileCheck %s
; ModuleID = 'arm64_vecCmpBr.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128"
target triple = "arm64-apple-ios3.0.0"
Modified: llvm/trunk/test/CodeGen/ARM64/vshr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/vshr.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/vshr.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/vshr.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s | FileCheck %s
+; RUN: llc -march=arm64 -arm64-neon-syntax=apple < %s -mcpu=cyclone | FileCheck %s
define <8 x i16> @testShiftRightArith_v8i16(<8 x i16> %a, <8 x i16> %b) #0 {
; CHECK-LABEL: testShiftRightArith_v8i16:
Modified: llvm/trunk/test/CodeGen/ARM64/vshuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/vshuffle.ll?rev=206313&r1=206312&r2=206313&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/vshuffle.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/vshuffle.ll Tue Apr 15 14:08:46 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -mcpu=cyclone | FileCheck %s
; The mask:
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