[llvm] r206276 - Optional hash symbol feature support for ARM64
Stepan Dyatkovskiy
stpworld at narod.ru
Tue Apr 15 04:43:09 PDT 2014
Author: dyatkovskiy
Date: Tue Apr 15 06:43:09 2014
New Revision: 206276
URL: http://llvm.org/viewvc/llvm-project?rev=206276&view=rev
Log:
Optional hash symbol feature support for ARM64
http://reviews.llvm.org/D3328
Added:
llvm/trunk/test/MC/ARM64/optional-hash.s
Modified:
llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
Modified: llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp?rev=206276&r1=206275&r2=206276&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp Tue Apr 15 06:43:09 2014
@@ -2023,8 +2023,10 @@ ARM64AsmParser::tryParsePrefetch(Operand
SMLoc S = getLoc();
const AsmToken &Tok = Parser.getTok();
// Either an identifier for named values or a 5-bit immediate.
- if (Tok.is(AsmToken::Hash)) {
- Parser.Lex(); // Eat hash token.
+ bool Hash = Tok.is(AsmToken::Hash);
+ if (Hash || Tok.is(AsmToken::Integer)) {
+ if (Hash)
+ Parser.Lex(); // Eat hash token.
const MCExpr *ImmVal;
if (getParser().parseExpression(ImmVal))
return MatchOperand_ParseFail;
@@ -2135,9 +2137,11 @@ ARM64AsmParser::OperandMatchResultTy
ARM64AsmParser::tryParseFPImm(OperandVector &Operands) {
SMLoc S = getLoc();
- if (Parser.getTok().isNot(AsmToken::Hash))
- return MatchOperand_NoMatch;
- Parser.Lex(); // Eat the '#'.
+ bool Hash = false;
+ if (Parser.getTok().is(AsmToken::Hash)) {
+ Parser.Lex(); // Eat '#'
+ Hash = true;
+ }
// Handle negation, as that still comes through as a separate token.
bool isNegative = false;
@@ -2183,6 +2187,9 @@ ARM64AsmParser::tryParseFPImm(OperandVec
return MatchOperand_Success;
}
+ if (!Hash)
+ return MatchOperand_NoMatch;
+
TokError("invalid floating point immediate");
return MatchOperand_ParseFail;
}
@@ -2257,9 +2264,12 @@ bool ARM64AsmParser::parseOptionalShift(
Parser.Lex();
// We expect a number here.
- if (getLexer().isNot(AsmToken::Hash))
+ bool Hash = getLexer().is(AsmToken::Hash);
+ if (!Hash && getLexer().isNot(AsmToken::Integer))
return TokError("immediate value expected for shifter operand");
- Parser.Lex(); // Eat the '#'.
+
+ if (Hash)
+ Parser.Lex(); // Eat the '#'.
SMLoc ExprLoc = getLoc();
const MCExpr *ImmVal;
@@ -2318,14 +2328,16 @@ bool ARM64AsmParser::parseOptionalExtend
return false;
}
- if (getLexer().isNot(AsmToken::Hash)) {
+ bool Hash = getLexer().is(AsmToken::Hash);
+ if (!Hash && getLexer().isNot(AsmToken::Integer)) {
SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1);
Operands.push_back(
ARM64Operand::CreateExtend(ExtOp, 0, S, E, getContext()));
return false;
}
- Parser.Lex(); // Eat the '#'.
+ if (Hash)
+ Parser.Lex(); // Eat the '#'.
const MCExpr *ImmVal;
if (getParser().parseExpression(ImmVal))
@@ -2593,9 +2605,11 @@ ARM64AsmParser::tryParseBarrierOperand(O
const AsmToken &Tok = Parser.getTok();
// Can be either a #imm style literal or an option name
- if (Tok.is(AsmToken::Hash)) {
+ bool Hash = Tok.is(AsmToken::Hash);
+ if (Hash || Tok.is(AsmToken::Integer)) {
// Immediate operand.
- Parser.Lex(); // Eat the '#'
+ if (Hash)
+ Parser.Lex(); // Eat the '#'
const MCExpr *ImmVal;
SMLoc ExprLoc = getLoc();
if (getParser().parseExpression(ImmVal))
@@ -2830,13 +2844,15 @@ bool ARM64AsmParser::parseMemory(Operand
Parser.Lex(); // Eat the extend op.
+ bool Hash = getLexer().is(AsmToken::Hash);
if (getLexer().is(AsmToken::RBrac)) {
// No immediate operand.
if (ExtOp == ARM64_AM::UXTX)
return Error(ExtLoc, "LSL extend requires immediate operand");
- } else if (getLexer().is(AsmToken::Hash)) {
+ } else if (Hash || getLexer().is(AsmToken::Integer)) {
// Immediate operand.
- Parser.Lex(); // Eat the '#'
+ if (Hash)
+ Parser.Lex(); // Eat the '#'
const MCExpr *ImmVal;
SMLoc ExprLoc = getLoc();
if (getParser().parseExpression(ImmVal))
@@ -2864,8 +2880,10 @@ bool ARM64AsmParser::parseMemory(Operand
return false;
// Immediate expressions.
- } else if (Parser.getTok().is(AsmToken::Hash)) {
- Parser.Lex(); // Eat hash token.
+ } else if (Parser.getTok().is(AsmToken::Hash) ||
+ Parser.getTok().is(AsmToken::Integer)) {
+ if (Parser.getTok().is(AsmToken::Hash))
+ Parser.Lex(); // Eat hash token.
if (parseSymbolicImmVal(OffsetExpr))
return true;
@@ -3159,10 +3177,13 @@ bool ARM64AsmParser::parseOperand(Operan
Operands.push_back(ARM64Operand::CreateImm(IdVal, S, E, getContext()));
return false;
}
+ case AsmToken::Integer:
+ case AsmToken::Real:
case AsmToken::Hash: {
// #42 -> immediate.
S = getLoc();
- Parser.Lex();
+ if (getLexer().is(AsmToken::Hash))
+ Parser.Lex();
// The only Real that should come through here is a literal #0.0 for
// the fcmp[e] r, #0.0 instructions. They expect raw token operands,
Added: llvm/trunk/test/MC/ARM64/optional-hash.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM64/optional-hash.s?rev=206276&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM64/optional-hash.s (added)
+++ llvm/trunk/test/MC/ARM64/optional-hash.s Tue Apr 15 06:43:09 2014
@@ -0,0 +1,31 @@
+; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
+.text
+; parseOperand check
+; CHECK: add sp, sp, #32 ; encoding: [0xff,0x83,0x00,0x91]
+ add sp, sp, 32
+
+; Optional shift
+; CHECK: adds x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xb1]
+adds x3, x4, 1024, lsl 12
+
+; Optional extend
+; CHECK: add sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0x8b]
+add sp, x2, x3, uxtx 0
+
+; FP immediates
+; CHECK: fmov s1, #1.250000e-01 ; encoding: [0x01,0x10,0x28,0x1e]
+fmov s1, 0.125
+
+; Barrier operand
+; CHECK: dmb osh ; encoding: [0xbf,0x33,0x03,0xd5]
+dmb 3
+
+; Prefetch and memory
+
+; Single register inside []
+; CHECK: ldnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x28]
+ldnp w3, w2, [x15, 16]
+
+; Memory, two registers inside []
+; CHECK: prfm pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8]
+prfm pstl3strm, [x4, x5, lsl 3]
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