[llvm] r205529 - Fix for PR 19261:
Eric Christopher
echristo at gmail.com
Mon Apr 14 15:55:47 PDT 2014
Done. r206218.
-eric
On Mon, Apr 14, 2014 at 2:04 AM, Daniel Sanders
<Daniel.Sanders at imgtec.com> wrote:
> That would be great. Thanks.
>
>> -----Original Message-----
>> From: Eric Christopher [mailto:echristo at gmail.com]
>> Sent: 11 April 2014 21:57
>> To: Daniel Sanders
>> Cc: llvm-commits at cs.uiuc.edu
>> Subject: Re: [llvm] r205529 - Fix for PR 19261:
>>
>> I'd have thought so, but it seems to be insufficient... the instructions should
>> be marked with FrameSetup though, would you like me to commit my patch
>> that did so?
>>
>> -eric
>>
>> On Fri, Apr 4, 2014 at 3:31 AM, Daniel Sanders <Daniel.Sanders at imgtec.com>
>> wrote:
>> > I've just had a quick look and it appears that the prologue_end marker is
>> appearing at the start of the prologue in this case.
>> > # BB#0: # %entry
>> > .loc 1 1 0 prologue_end # test.c:1:0
>> > addiu $sp, $sp, -8
>> > $tmp0:
>> >
>> > I'm not familiar with the debug info code but I think the problem is that we
>> don't set the MachineInstr::FrameSetup on any instruction in the prologue.
>> Does that sound right to you?
>> >
>> >> -----Original Message-----
>> >> From: Eric Christopher [mailto:echristo at gmail.com]
>> >> Sent: 03 April 2014 18:54
>> >> To: Daniel Sanders
>> >> Cc: llvm-commits at cs.uiuc.edu
>> >> Subject: Re: [llvm] r205529 - Fix for PR 19261:
>> >>
>> >> I've relaxed the testcase for now and I think it works for mips (I
>> >> tested it with -march=mips on llc by hand). I'll keep an eye out.
>> >>
>> >> FWIW there's something odd going on for mips here. It has two line
>> >> table entries for address 0. Probably worth taking a look at some point.
>> >>
>> >> -eric
>> >>
>> >> On Thu, Apr 3, 2014 at 10:08 AM, Eric Christopher
>> >> <echristo at gmail.com>
>> >> wrote:
>> >> > I can see it on a couple of the others as well. I'll take a look. I
>> >> > think the testcase may just need to be relaxed.
>> >> >
>> >> > On Apr 3, 2014 7:03 AM, "Daniel Sanders"
>> >> > <Daniel.Sanders at imgtec.com>
>> >> wrote:
>> >> >>
>> >> >> Hi Eric,
>> >> >>
>> >> >> I think this commit caused llvm-mips-linux buildbot to turn red
>> >> >> and I don't think it has sent an email (I'm also on the blamelist
>> >> >> and I haven't received one).
>> >> >> The build is
>> >> >> http://lab.llvm.org:8011/builders/llvm-mips-linux/builds/8028
>> >> >>
>> >> >> I've re-run the test on an X86 with -march=mips added to the llc
>> >> >> command and it seems that an extra entry appears in the line
>> >> >> information between the CHECK and the CHECK-NEXT:
>> >> >> Address Line Column File ISA Discriminator Flags
>> >> >> ------------------ ------ ------ ------ --- ------------- -------------
>> >> >> 0x0000000000000000 1 0 1 0 0 is_stmt
>> >> >> 0x0000000000000000 1 0 1 0 0 is_stmt
>> >> >> prologue_end <--- extra line
>> >> >> 0x0000000000000010 2 0 1 0 0 is_stmt
>> >> >> 0x0000000000000018 4 0 1 0 0 is_stmt
>> >> >> 0x0000000000000020 6 0 1 0 0 is_stmt
>> >> >> 0x0000000000000034 6 0 1 0 0 is_stmt
>> >> >> end_sequence
>> >> >>
>> >> >> > -----Original Message-----
>> >> >> > From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
>> >> >> > bounces at cs.uiuc.edu] On Behalf Of Eric Christopher
>> >> >> > Sent: 03 April 2014 13:12
>> >> >> > To: llvm-commits at cs.uiuc.edu
>> >> >> > Subject: [llvm] r205529 - Fix for PR 19261:
>> >> >> >
>> >> >> > Author: echristo
>> >> >> > Date: Thu Apr 3 07:11:51 2014
>> >> >> > New Revision: 205529
>> >> >> >
>> >> >> > URL: http://llvm.org/viewvc/llvm-project?rev=205529&view=rev
>> >> >> > Log:
>> >> >> > Fix for PR 19261:
>> >> >> >
>> >> >> > llc doesn't generate nodes for unconditional fall-through
>> >> >> > branches for targets without FastISel implementation (X86 has
>> >> >> > it, but can be disabled by
>> >> >> > "-fast-isel=false") in SelectionDAGBuilder::visitBr().
>> >> >> >
>> >> >> > So for line 4 in the following testcase
>> >> >> >
>> >> >> > 1: void foo(int i){
>> >> >> > 2: switch(i){
>> >> >> > 3: default:
>> >> >> > 4: break;
>> >> >> > 5: }
>> >> >> > 6: return;
>> >> >> > 7: }
>> >> >> >
>> >> >> > there is no corresponding line in .debug_line section, and a
>> >> >> > debugger cannot set a breakpoint at line 4.
>> >> >> >
>> >> >> > Fix this by always emitting a branch when we're not optimizing
>> >> >> > and add a testcase to ensure that there's code on every line
>> >> >> > we'd want to
>> >> break.
>> >> >> >
>> >> >> > Patch by Daniil Fukalov.
>> >> >> >
>> >> >> > Added:
>> >> >> > llvm/trunk/test/DebugInfo/unconditional-branch.ll
>> >> >> > Modified:
>> >> >> > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>> >> >> >
>> >> >> > Modified:
>> >> >> > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>> >> >> > URL: http://llvm.org/viewvc/llvm-
>> >> >> >
>> >> project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>> >> >> > ?re v=205529&r1=205528&r2=205529&view=diff
>> >> >> >
>> >>
>> ==========================================================
>> >> >> > ====================
>> >> >> > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>> >> >> > (original)
>> >> >> > +++
>> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>> >> Thu
>> >> >> > Apr
>> >> >> > +++ 3 07:11:51 2014
>> >> >> > @@ -1571,8 +1571,9 @@ void SelectionDAGBuilder::visitBr(const
>> >> >> > // Update machine-CFG edges.
>> >> >> > BrMBB->addSuccessor(Succ0MBB);
>> >> >> >
>> >> >> > - // If this is not a fall-through branch, emit the branch.
>> >> >> > - if (Succ0MBB != NextBlock)
>> >> >> > + // If this is not a fall-through branch or optimizations
>> >> >> > + are
>> >> >> > switched off,
>> >> >> > + // emit the branch.
>> >> >> > + if (Succ0MBB != NextBlock || TM.getOptLevel() ==
>> >> >> > + CodeGenOpt::None)
>> >> >> > DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
>> >> >> > MVT::Other, getControlRoot(),
>> >> >> > DAG.getBasicBlock(Succ0MBB)));
>> >> >> >
>> >> >> > Added: llvm/trunk/test/DebugInfo/unconditional-branch.ll
>> >> >> > URL: http://llvm.org/viewvc/llvm-
>> >> >> > project/llvm/trunk/test/DebugInfo/unconditional-
>> >> >> > branch.ll?rev=205529&view=auto
>> >> >> >
>> >>
>> ==========================================================
>> >> >> > ====================
>> >> >> > --- llvm/trunk/test/DebugInfo/unconditional-branch.ll (added)
>> >> >> > +++ llvm/trunk/test/DebugInfo/unconditional-branch.ll Thu Apr 3
>> >> >> > +++ 07:11:51 2014
>> >> >> > @@ -0,0 +1,64 @@
>> >> >> > +; REQUIRES: object-emission
>> >> >> > +; PR 19261
>> >> >> > +
>> >> >> > +; RUN: %llc_dwarf -fast-isel=false -O0 -filetype=obj < %s > %t ; RUN:
>> >> >> > +llvm-dwarfdump %t | FileCheck %s
>> >> >> > +
>> >> >> > +; CHECK: {{0x[0-9a-f]+}} 1 0 1 0 0
>> >> >> > is_stmt
>> >> >> > +; CHECK-NEXT: {{0x[0-9a-f]+}} 2 0 1 0 0
>> >> >> > is_stmt
>> >> >> > +; CHECK-NEXT: {{0x[0-9a-f]+}} 4 0 1 0 0
>> >> >> > is_stmt
>> >> >> > +
>> >> >> > +; IR generated from clang -O0 -g with the following source:
>> >> >> > +;void foo(int i){
>> >> >> > +; switch(i){
>> >> >> > +; default:
>> >> >> > +; break;
>> >> >> > +; }
>> >> >> > +; return;
>> >> >> > +;}
>> >> >> > +
>> >> >> > +; Function Attrs: nounwind
>> >> >> > +define void @foo(i32 %i) #0 {
>> >> >> > +entry:
>> >> >> > + %i.addr = alloca i32, align 4
>> >> >> > + store i32 %i, i32* %i.addr, align 4
>> >> >> > + call void @llvm.dbg.declare(metadata !{i32* %i.addr},
>> >> >> > +metadata !12), !dbg !13
>> >> >> > + %0 = load i32* %i.addr, align 4, !dbg !14
>> >> >> > + switch i32 %0, label %sw.default [
>> >> >> > + ], !dbg !14
>> >> >> > +
>> >> >> > +sw.default: ; preds = %entry
>> >> >> > + br label %sw.epilog, !dbg !15
>> >> >> > +
>> >> >> > +sw.epilog: ; preds = %sw.default
>> >> >> > + ret void, !dbg !17
>> >> >> > +}
>> >> >> > +
>> >> >> > +; Function Attrs: nounwind readnone declare void
>> >> >> > + at llvm.dbg.declare(metadata, metadata) #1
>> >> >> > +
>> >> >> > +attributes #0 = { nounwind "less-precise-fpmad"="false"
>> >> >> > +"no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"
>> >> >> > +"no-infs-fp-math"="false" "no-nans-fp-math"="false"
>> >> >> > +"stack-protector-buffer-size"="8" "unsafe-fp-math"="false"
>> >> >> > +"use-soft-float"="false" } attributes #1 = { nounwind readnone
>> >> >> > +}
>> >> >> > +
>> >> >> > +!llvm.dbg.cu = !{!0}
>> >> >> > +!llvm.module.flags = !{!9, !10} !llvm.ident = !{!11}
>> >> >> > +
>> >> >> > +!0 = metadata !{i32 786449, metadata !1, i32 12, metadata
>> >> >> > +!"clang version 3.5.0 (204712)", i1 false, metadata !"", i32 0,
>> >> >> > +metadata !2, metadata !2, metadata !3, metadata !2, metadata
>> >> >> > +!2, metadata !"", i32 1} ; [ DW_TAG_compile_unit ]
>> >> >> > +[D:\work\EPRs\396363/test.c]
>> >> >> > [DW_LANG_C99]
>> >> >> > +!1 = metadata !{metadata !"test.c", metadata
>> >> >> > +!"D:\5Cwork\5CEPRs\5C396363"}
>> >> >> > +!2 = metadata !{}
>> >> >> > +!3 = metadata !{metadata !4}
>> >> >> > +!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata
>> >> >> > +!"foo",
>> >> >> > metadata !"foo", metadata !"", i32 1, metadata !6, i1 false, i1
>> >> >> > true,
>> >> >> > i32 0, i32 0,
>> >> >> > null, i32 256, i1 false, void (i32)* @foo, null, null, metadata
>> >> >> > !2,
>> >> >> > i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [foo]
>> >> >> > +!5 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type
>> >> >> > ]
>> >> >> > [D:\work\EPRs\396363/test.c]
>> >> >> > +!6 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0,
>> >> >> > +i64 0,
>> >> >> > +i64 0, i64 0, i32 0, null, metadata !7, i32 0, null, null,
>> >> >> > +null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0,
>> >> >> > +offset 0] [from ]
>> >> >> > +!7 = metadata !{null, metadata !8}
>> >> >> > +!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0,
>> >> >> > +i64 32,
>> >> >> > +i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line
>> >> >> > +0, size 32, align 32, offset 0, enc DW_ATE_signed]
>> >> >> > +!9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}
>> >> >> > +!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
>> >> >> > +!11 = metadata !{metadata !"clang version 3.5.0 (204712)"}
>> >> >> > +!12 = metadata !{i32 786689, metadata !4, metadata !"i",
>> >> >> > +metadata !5,
>> >> >> > +i32 16777217, metadata !8, i32 0, i32 0} ; [
>> >> >> > +DW_TAG_arg_variable ] [i] [line 1]
>> >> >> > +!13 = metadata !{i32 1, i32 0, metadata !4, null}
>> >> >> > +!14 = metadata !{i32 2, i32 0, metadata !4, null}
>> >> >> > +!15 = metadata !{i32 4, i32 0, metadata !16, null}
>> >> >> > +!16 = metadata !{i32 786443, metadata !1, metadata !4, i32 2,
>> >> >> > +i32 0,
>> >> >> > +i32 0, i32 0} ; [ DW_TAG_lexical_block ]
>> >> >> > +[D:\work\EPRs\396363/test.c]
>> >> >> > +!17 = metadata !{i32 6, i32 0, metadata !4, null}
>> >> >> >
>> >> >> >
>> >> >> > _______________________________________________
>> >> >> > llvm-commits mailing list
>> >> >> > llvm-commits at cs.uiuc.edu
>> >> >> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
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