[llvm] r206208 - Fix for codegen bug that could cause illegal cmn instruction generation

Louis Gerbarg lgg at apple.com
Mon Apr 14 14:05:05 PDT 2014


Author: louis
Date: Mon Apr 14 16:05:05 2014
New Revision: 206208

URL: http://llvm.org/viewvc/llvm-project?rev=206208&view=rev
Log:
Fix for codegen bug that could cause illegal cmn instruction generation

In rare cases the dead definition elimination pass code can cause illegal cmn
instructions when it replaces dead registers on instructions that use
unmaterialized frame indexes. This patch disables the dead definition
optimization for instructions which include frame index operands.

rdar://16438284

Added:
    llvm/trunk/test/CodeGen/ARM64/dead-def-frame-index.ll
Modified:
    llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp

Modified: llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp?rev=206208&r1=206207&r2=206208&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp Mon Apr 14 16:05:05 2014
@@ -30,7 +30,7 @@ private:
   const TargetRegisterInfo *TRI;
   bool implicitlyDefinesSubReg(unsigned Reg, const MachineInstr *MI);
   bool processMachineBasicBlock(MachineBasicBlock *MBB);
-
+  bool usesFrameIndex(const MachineInstr *MI);
 public:
   static char ID; // Pass identification, replacement for typeid.
   explicit ARM64DeadRegisterDefinitions() : MachineFunctionPass(ID) {}
@@ -57,12 +57,27 @@ bool ARM64DeadRegisterDefinitions::impli
   return false;
 }
 
+bool ARM64DeadRegisterDefinitions::usesFrameIndex(const MachineInstr *MI) {
+  for (int I = MI->getDesc().getNumDefs(), E = MI->getNumOperands(); I != E; ++I) {
+    if (MI->getOperand(I).isFI())
+      return true;
+  }
+  return false;
+}
+
 bool
 ARM64DeadRegisterDefinitions::processMachineBasicBlock(MachineBasicBlock *MBB) {
   bool Changed = false;
   for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
        ++I) {
     MachineInstr *MI = I;
+    if (usesFrameIndex(MI)) {
+      // We need to skip this instruction because while it appears to have a
+      // dead def it uses a frame index which might expand into a multi
+      // instruction sequence during EPI
+      DEBUG(dbgs() << "    Ignoring, operand is frame index\n");
+      continue;
+    }
     for (int i = 0, e = MI->getDesc().getNumDefs(); i != e; ++i) {
       MachineOperand &MO = MI->getOperand(i);
       if (MO.isReg() && MO.isDead() && MO.isDef()) {

Added: llvm/trunk/test/CodeGen/ARM64/dead-def-frame-index.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/dead-def-frame-index.ll?rev=206208&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/dead-def-frame-index.ll (added)
+++ llvm/trunk/test/CodeGen/ARM64/dead-def-frame-index.ll Mon Apr 14 16:05:05 2014
@@ -0,0 +1,18 @@
+; RUN: llc -march=arm64 < %s | FileCheck %s
+
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "arm64-apple-ios7.0.0"
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @test1() #0 {
+  %tmp1 = alloca i8
+  %tmp2 = alloca i32, i32 4096
+  %tmp3 = icmp eq i8* %tmp1, null
+  %tmp4 = zext i1 %tmp3 to i32
+
+  ret i32 %tmp4
+
+  ; CHECK-LABEL: test1
+  ; CHECK:   adds [[TEMP:[a-z0-9]+]], sp, #16384
+  ; CHECK:   adds [[TEMP]], [[TEMP]], #15
+}





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