[llvm] r206172 - ARM64: remove buggy REV16 pattern.

[Tim Northover]

Author: tnorthover
Date: Mon Apr 14 07:59:52 2014
New Revision: 206172

URL: http://llvm.org/viewvc/llvm-project?rev=206172&view=rev
Log:
ARM64: remove buggy REV16 pattern.

The 32-bit pattern is still valid: 0123 -> 3210 -> 1032.

Modified:
    llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.td
    llvm/trunk/test/CodeGen/ARM64/rev.ll

Modified: llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.td?rev=206172&r1=206171&r2=206172&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64InstrInfo.td Mon Apr 14 07:59:52 2014
@@ -645,8 +645,7 @@ defm CLZ    : OneOperandData<0b100, "clz
 defm RBIT   : OneOperandData<0b000, "rbit">;
 def  REV16Wr : OneWRegData<0b001, "rev16",
                                   UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
-def  REV16Xr : OneXRegData<0b001, "rev16",
-                                  UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
+def  REV16Xr : OneXRegData<0b001, "rev16", null_frag>;
 
 def : Pat<(cttz GPR32:$Rn),
           (CLZWr (RBITWr GPR32:$Rn))>;

Modified: llvm/trunk/test/CodeGen/ARM64/rev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/rev.ll?rev=206172&r1=206171&r2=206172&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM64/rev.ll (original)
+++ llvm/trunk/test/CodeGen/ARM64/rev.ll Mon Apr 14 07:59:52 2014
@@ -36,10 +36,13 @@ entry:
   ret i32 %tmp14
 }
 
+; 64-bit REV16 is *not* a swap then a 16-bit rotation:
+;   01234567 ->(bswap) 76543210 ->(rotr) 10765432
+;   01234567 ->(rev16) 10325476
 define i64 @test_rev16_x(i64 %a) nounwind {
 entry:
 ; CHECK-LABEL: test_rev16_x:
-; CHECK: rev16 x0, x0
+; CHECK-NOT: rev16 x0, x0
   %0 = tail call i64 @llvm.bswap.i64(i64 %a)
   %1 = lshr i64 %0, 16
   %2 = shl i64 %0, 48