[PATCH] AArch64: big endian constant vector pools

[Jiangning Liu]

Hi Tim,

> Are you changing your mind and arguing the consistent in-register data
> > layout for big-endian and little-endian? I'm personally happy with that,
> but
> > it will not work together with GCC, and is violating aapcs64, isn't it?
>
> To make it work, you have to fiddle the vectors into AAPCS-specified
> form at every ABI-visible boundary (hence the changes to LowerCall
> etc).
>

I see, so you mean we should allow not to follow AAPCS if only it is not
ABI-visible. I think at this point I'm OK with that.

The solution you described above implies introducing "rev" for arguments
and return values passed by VPR at all function boundaries, so wouldn't it
cause poor performance? This is simply because it would make LLVM
implementation easier, and I think to some extension it's unacceptable.

However, I'm OK to move forward with two steps. Step 1 is to implement the
simplified solution as you probably proposed, and for step 2 finally we
need to optimize those unnecessary "rev"s removed.

Thanks,
-Jiangning
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