[llvm] r206153 - Revert r206045, "Fix shift by constants for vector."
Hao Liu
Hao.Liu at arm.com
Mon Apr 14 01:20:42 PDT 2014
Yes. This will also cause the failure in
http://llvm.org/bugs/show_bug.cgi?id=19420.
Now this bug won't need to be fixed.
Thanks,
-Hao
> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> bounces at cs.uiuc.edu] On Behalf Of NAKAMURA Takumi
> Sent: Monday, April 14, 2014 3:03 PM
> To: llvm-commits at cs.uiuc.edu
> Subject: [llvm] r206153 - Revert r206045, "Fix shift by constants for
vector."
>
> Author: chapuni
> Date: Mon Apr 14 02:02:57 2014
> New Revision: 206153
>
> URL: http://llvm.org/viewvc/llvm-project?rev=206153&view=rev
> Log:
> Revert r206045, "Fix shift by constants for vector."
>
> It broke some builders, at least, i686.
>
> Modified:
> llvm/trunk/lib/Transforms/InstCombine/InstCombine.h
> llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
> llvm/trunk/test/Transforms/InstCombine/shift.ll
>
> Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=206153&r
> 1=206152&r2=206153&view=diff
> ===============================================================
> ===============
> --- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original)
> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Mon Apr 14
> +++ 02:02:57 2014
> @@ -171,7 +171,7 @@ public:
> ICmpInst::Predicate Pred);
> Instruction *FoldGEPICmp(GEPOperator *GEPLHS, Value *RHS,
> ICmpInst::Predicate Cond, Instruction &I);
> - Instruction *FoldShiftByConstant(Value *Op0, Constant *Op1,
> + Instruction *FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
> BinaryOperator &I);
> Instruction *commonCastTransforms(CastInst &CI);
> Instruction *commonPointerCastTransforms(CastInst &CI);
>
> Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=2
> 06153&r1=206152&r2=206153&view=diff
> ===============================================================
> ===============
> --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
> +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Mon Apr
> +++ 14 02:02:57 2014
> @@ -33,7 +33,7 @@ Instruction *InstCombiner::commonShiftTr
> if (Instruction *R = FoldOpIntoSelect(I, SI))
> return R;
>
> - if (Constant *CUI = dyn_cast<Constant>(Op1))
> + if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
> if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
> return Res;
>
> @@ -309,30 +309,20 @@ static Value *GetShiftedValue(Value *V,
>
>
>
> -Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1,
> +Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt
> +*Op1,
> BinaryOperator &I) {
> bool isLeftShift = I.getOpcode() == Instruction::Shl;
>
> - ConstantInt *COp1 = nullptr;
> - if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1))
> - COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
> - else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1))
> - COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
> - else
> - COp1 = dyn_cast<ConstantInt>(Op1);
> -
> - if (!COp1)
> - return nullptr;
>
> // See if we can propagate this shift into the input, this covers the
trivial
> // cast of lshr(shl(x,c1),c2) as well as other more complex cases.
> if (I.getOpcode() != Instruction::AShr &&
> - CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this))
{
> + CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this))
> + {
> DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through
> expression"
> " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I
<<"\n");
>
> return ReplaceInstUsesWith(I,
> - GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift,
*this));
> + GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift,
> + *this));
> }
>
>
> @@ -343,7 +333,7 @@ Instruction *InstCombiner::FoldShiftByCo
> // shl i32 X, 32 = 0 and srl i8 Y, 9 = 0, ... just don't eliminate
> // a signed shift.
> //
> - if (COp1->uge(TypeBits)) {
> + if (Op1->uge(TypeBits)) {
> if (I.getOpcode() != Instruction::AShr)
> return ReplaceInstUsesWith(I,
Constant::getNullValue(Op0->getType()));
> // ashr i32 X, 32 --> ashr i32 X, 31 @@ -356,7 +346,7 @@ Instruction
> *InstCombiner::FoldShiftByCo
> if (BO->getOpcode() == Instruction::Mul && isLeftShift)
> if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
> return BinaryOperator::CreateMul(BO->getOperand(0),
> - ConstantExpr::getShl(BOOp,
COp1));
> + ConstantExpr::getShl(BOOp,
> + Op1));
>
> // Try to fold constant and into select arguments.
> if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) @@ -377,7 +367,7 @@
> Instruction *InstCombiner::FoldShiftByCo
> if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
> isa<ConstantInt>(TrOp->getOperand(1))) {
> // Okay, we'll do this xform. Make the shift of shift.
> - Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType());
> + Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType());
> // (shift2 (shift1 & 0x00FF), c2)
> Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp,
> ShAmt,I.getName());
>
> @@ -394,10 +384,10 @@ Instruction *InstCombiner::FoldShiftByCo
> // shift. We know that it is a logical shift by a constant, so
adjust the
> // mask as appropriate.
> if (I.getOpcode() == Instruction::Shl)
> - MaskV <<= COp1->getZExtValue();
> + MaskV <<= Op1->getZExtValue();
> else {
> assert(I.getOpcode() == Instruction::LShr && "Unknown logical
shift");
> - MaskV = MaskV.lshr(COp1->getZExtValue());
> + MaskV = MaskV.lshr(Op1->getZExtValue());
> }
>
> // shift1 & 0x00FF
> @@ -431,7 +421,7 @@ Instruction *InstCombiner::FoldShiftByCo
> // (X + (Y << C))
> Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
>
Op0BO->getOperand(1)->getName());
> - uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
> + uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
> return BinaryOperator::CreateAnd(X,
ConstantInt::get(I.getContext(),
> APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
> }
> @@ -463,7 +453,7 @@ Instruction *InstCombiner::FoldShiftByCo
> // (X + (Y << C))
> Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
>
Op0BO->getOperand(0)->getName());
> - uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
> + uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
> return BinaryOperator::CreateAnd(X,
ConstantInt::get(I.getContext(),
> APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
> }
> @@ -551,7 +541,7 @@ Instruction *InstCombiner::FoldShiftByCo
>
> ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
> uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
> - uint32_t ShiftAmt2 = COp1->getLimitedValue(TypeBits);
> + uint32_t ShiftAmt2 = Op1->getLimitedValue(TypeBits);
> assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
> if (ShiftAmt1 == 0) return 0; // Will be simplified in the future.
> Value *X = ShiftOp->getOperand(0);
>
> Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
> URL: http://llvm.org/viewvc/llvm-
> project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=206153&r1=206
> 152&r2=206153&view=diff
> ===============================================================
> ===============
> --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
> +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Mon Apr 14 02:02:57
> +++ 2014
> @@ -36,52 +36,17 @@ define i32 @test4(i8 %A) { define i32 @test5(i32 %A)
> { ; CHECK-LABEL: @test5( ; CHECK: ret i32 undef
> - %B = lshr i32 %A, 32 ;; shift all bits out
> + %B = lshr i32 %A, 32 ;; shift all bits out
> ret i32 %B
> }
>
> -define <4 x i32> @test5_splat_vector(<4 x i32> %A) { -; CHECK-LABEL:
> @test5_splat_vector( -; CHECK: ret <4 x i32> undef
> - %B = lshr <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift
all bits out
> - ret <4 x i32> %B
> -}
> -
> -define <4 x i32> @test5_zero_vector(<4 x i32> %A) { -; CHECK-LABEL:
> @test5_zero_vector( -; CHECK-NEXT: ret <4 x i32> %A
> - %B = lshr <4 x i32> %A, zeroinitializer
> - ret <4 x i32> %B
> -}
> -
> -define <4 x i32> @test5_non_splat_vector(<4 x i32> %A) { -; CHECK-LABEL:
> @test5_non_splat_vector( -; CHECK-NOT: ret <4 x i32> undef
> - %B = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
> - ret <4 x i32> %B
> -}
> -
> define i32 @test5a(i32 %A) {
> ; CHECK-LABEL: @test5a(
> ; CHECK: ret i32 undef
> - %B = shl i32 %A, 32 ;; shift all bits out
> + %B = shl i32 %A, 32 ;; shift all bits out
> ret i32 %B
> }
>
> -define <4 x i32> @test5a_splat_vector(<4 x i32> %A) { -; CHECK-LABEL:
> @test5a_splat_vector( -; CHECK: ret <4 x i32> undef
> - %B = shl <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift
all bits out
> - ret <4 x i32> %B
> -}
> -
> -define <4 x i32> @test5a_non_splat_vector(<4 x i32> %A) { -; CHECK-LABEL:
> @test5a_non_splat_vector( -; CHECK-NOT: ret <4 x i32> undef
> - %B = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
> - ret <4 x i32> %B
> -}
> -
> define i32 @test5b() {
> ; CHECK-LABEL: @test5b(
> ; CHECK: ret i32 -1
> @@ -117,7 +82,7 @@ define i32 @test6a(i32 %A) { define i32 @test7(i8 %A)
> { ; CHECK-LABEL: @test7( ; CHECK-NEXT: ret i32 -1
> - %shift.upgrd.3 = zext i8 %A to i32
> + %shift.upgrd.3 = zext i8 %A to i32
> %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
> ret i32 %B
> }
> @@ -267,7 +232,7 @@ define i1 @test16(i32 %X) { ; CHECK-NEXT: and
> i32 %X, 16 ; CHECK-NEXT: icmp ne i32 ; CHECK-NEXT: ret i1
> - %tmp.3 = ashr i32 %X, 4
> + %tmp.3 = ashr i32 %X, 4
> %tmp.6 = and i32 %tmp.3, 1
> %tmp.7 = icmp ne i32 %tmp.6, 0
> ret i1 %tmp.7
> @@ -400,12 +365,12 @@ define i1 @test27(i32 %x) nounwind {
> %z = trunc i32 %y to i1
> ret i1 %z
> }
> -
> +
> define i8 @test28(i8 %x) {
> entry:
> ; CHECK-LABEL: @test28(
> ; CHECK: icmp slt i8 %x, 0
> -; CHECK-NEXT: br i1
> +; CHECK-NEXT: br i1
> %tmp1 = lshr i8 %x, 7
> %cond1 = icmp ne i8 %tmp1, 0
> br i1 %cond1, label %bb1, label %bb2
> @@ -511,7 +476,7 @@ entry:
> %ins = or i128 %tmp23, %tmp27
> %tmp45 = lshr i128 %ins, 64
> ret i128 %tmp45
> -
> +
> ; CHECK-LABEL: @test36(
> ; CHECK: %tmp231 = or i128 %B, %A
> ; CHECK: %ins = and i128 %tmp231, 18446744073709551615 @@ -527,7
> +492,7 @@ entry:
> %tmp45 = lshr i128 %ins, 64
> %tmp46 = trunc i128 %tmp45 to i64
> ret i64 %tmp46
> -
> +
> ; CHECK-LABEL: @test37(
> ; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32 ; CHECK: %ins = or
> i128 %tmp23, %A @@ -815,32 +780,3 @@ bb11:
> bb12: ; preds = %bb11, %bb8,
%bb
> ret void
> }
> -
> -define i32 @test64(i32 %a) {
> -; CHECK-LABEL: @test64(
> -; CHECK-NEXT: ret i32 undef
> - %b = ashr i32 %a, 32 ; shift all bits out
> - ret i32 %b
> -}
> -
> -define <4 x i32> @test64_splat_vector(<4 x i32> %a) { -; CHECK-LABEL:
> @test64_splat_vector -; CHECK-NEXT: ret <4 x i32> undef
> - %b = ashr <4 x i32> %a, <i32 32, i32 32, i32 32, i32 32> ; shift all
bits out
> - ret <4 x i32> %b
> -}
> -
> -define <4 x i32> @test64_non_splat_vector(<4 x i32> %a) { -; CHECK-LABEL:
> @test64_non_splat_vector -; CHECK-NOT: ret <4 x i32> undef
> - %b = ashr <4 x i32> %a, <i32 32, i32 0, i32 1, i32 2> ; shift all bits
out
> - ret <4 x i32> %b
> -}
> -
> -define <2 x i65> @test_65(<2 x i64> %t) { -; CHECK-LABEL: @test_65
> - %a = zext <2 x i64> %t to <2 x i65>
> - %sext = shl <2 x i65> %a, <i65 33, i65 33>
> - %b = ashr <2 x i65> %sext, <i65 33, i65 33>
> - ret <2 x i65> %b
> -}
>
>
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