[PATCH] ARM: Add @llvm.arm.space to aid ARMConstantIslands testing

[Tim Northover]

Hi,

As we all know, testing ARMConstantIslands is a complete nightmare because you need thousands of lines of code to even start needing it.

This patch implements an "@llvm.arm.space(i32)" intrinsic which should make that much easer. It's the CodeGen equivalent of ".zero" in assembly, and immediately makes a basic block bigger by the amount in its argument.

It's not a panacea: getting just the perfect number of instructions for the split you're attempting to create is still tricky. But it should greatly improve matters.

I'm hoping to use it to actually write some more substantial tests for the pass, but wanted to get it out there to be used by Saleem in particular.

Does it look OK? Anyone got suggestions for improvement? Or enough other uses to justify it being generic?

Cheers.

Tim.

http://reviews.llvm.org/D3360

Files:
  include/llvm/IR/IntrinsicsARM.td
  lib/Target/ARM/ARMAsmPrinter.cpp
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMInstrInfo.td
  test/CodeGen/ARM/space-directive.ll

Index: include/llvm/IR/IntrinsicsARM.td
===================================================================
--- include/llvm/IR/IntrinsicsARM.td
+++ include/llvm/IR/IntrinsicsARM.td
@@ -20,6 +20,8 @@
 def int_arm_thread_pointer : GCCBuiltin<"__builtin_thread_pointer">,
             Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
 
+def int_arm_space : Intrinsic<[], [llvm_i32_ty], []>;
+
 //===----------------------------------------------------------------------===//
 // Saturating Arithmentic
 
Index: lib/Target/ARM/ARMAsmPrinter.cpp
===================================================================
--- lib/Target/ARM/ARMAsmPrinter.cpp
+++ lib/Target/ARM/ARMAsmPrinter.cpp
@@ -1459,6 +1459,9 @@
     EmitJumpTable(MI);
     return;
   }
+  case ARM::SPACE:
+    OutStreamer.EmitZeros(MI->getOperand(0).getImm());
+    return;
   case ARM::TRAP: {
     // Non-Darwin binutils don't yet support the "trap" mnemonic.
     // FIXME: Remove this special case when they do.
Index: lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -639,6 +639,8 @@
       ++NumEntries;
     return NumEntries * EntrySize + InstSize;
   }
+  case ARM::SPACE:
+    return MI->getOperand(0).getImm();
   }
 }
 
Index: lib/Target/ARM/ARMInstrInfo.td
===================================================================
--- lib/Target/ARM/ARMInstrInfo.td
+++ lib/Target/ARM/ARMInstrInfo.td
@@ -5560,3 +5560,7 @@
 // is discarded.
 def ITasm : ARMAsmPseudo<"it$mask $cc", (ins it_pred:$cc, it_mask:$mask)>,
          ComplexDeprecationPredicate<"IT">;
+
+let mayLoad = 1, mayStore =1, hasSideEffects = 1 in
+def SPACE : PseudoInst<(outs), (ins i32imm:$size), NoItinerary,
+                       [(int_arm_space imm:$size)]>;
Index: test/CodeGen/ARM/space-directive.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/space-directive.ll
@@ -0,0 +1,19 @@
+; RUN: llc -mtriple=armv7 -o - %s | FileCheck %s
+
+define i32 @test_space() minsize {
+; CHECK-LABEL: test_space:
+; CHECK: ldr {{r[0-9]+}}, [[CPENTRY:.?LCPI[0-9]+_[0-9]+]]
+; CHECK: b [[PAST_CP:.?LBB[0-9]+_[0-9]+]]
+
+; CHECK: [[CPENTRY]]:
+; CHECK-NEXT: 12345678
+
+; CHECK: [[PAST_CP]]:
+; CHECK: .zero 10000
+  %addr = inttoptr i32 12345678 to i32*
+  %val = load i32* %addr
+  call void @llvm.arm.space(i32 10000)
+  ret i32 %val
+}
+
+declare void @llvm.arm.space(i32)
\ No newline at end of file
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