[PATCH] Add 'musttail' marker to call instructions

[Philip Reames]

For the LangRef, I suggest we remove the text related to when a "tail" 
call is guaranteed.  With the addition of "musttail" these semantics are 
redundant.  Instead, "tail" should be advisory only. This would involve 
breaking backwards compatibility.

With the new option, should GauranteedTailCallOpt exist?  I suggest not.

In code, it would be useful to refer to the old "tail" attribute as "may 
tail".  This clarifies the semantics in code even if we don't change the 
IR name.  In particular, I'm referring to CallSite/Instruction here.

In the verifier you need to handle chains of bitcasts.  These will 
reduce to a single bitcast, but InstCombine may not have run yet. We 
don't want each opto pass to need to do this simplification.

Otherwise, LGTM and I support the addition.

Philip


On 03/31/2014 06:30 PM, Reid Kleckner wrote:
> Hi nicholas, chandlerc,
>
> This is similar to the 'tail' marker, except that it guarantees that
> tail call optimization will occur.  It also comes with convervative IR
> verification rules that ensure that tail call optimization is possible.
>
> http://llvm-reviews.chandlerc.com/D3240
>
> Files:
>    docs/LangRef.rst
>    include/llvm/Bitcode/LLVMBitCodes.h
>    include/llvm/IR/CallSite.h
>    include/llvm/IR/Instructions.h
>    lib/AsmParser/LLLexer.cpp
>    lib/AsmParser/LLParser.cpp
>    lib/AsmParser/LLParser.h
>    lib/AsmParser/LLToken.h
>    lib/Bitcode/Reader/BitcodeReader.cpp
>    lib/Bitcode/Writer/BitcodeWriter.cpp
>    lib/IR/AsmWriter.cpp
>    lib/IR/Verifier.cpp
>    lib/Target/AArch64/AArch64ISelLowering.cpp
>    lib/Target/ARM/ARMISelLowering.cpp
>    lib/Target/ARM64/ARM64ISelLowering.cpp
>    lib/Target/Mips/MipsISelLowering.cpp
>    lib/Target/PowerPC/PPCISelLowering.cpp
>    lib/Target/X86/X86ISelLowering.cpp
>    test/Bitcode/tailcall.ll
>    test/CodeGen/X86/musttail.ll
>    test/Verifier/musttail-invalid.ll
>    test/Verifier/musttail-valid.ll
>
>
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