[llvm] r205680 - MachineInstr: introduce explicit_operands and implicit_operands ranges
David Blaikie
dblaikie at gmail.com
Sat Apr 5 15:42:04 PDT 2014
Author: dblaikie
Date: Sat Apr 5 17:42:04 2014
New Revision: 205680
URL: http://llvm.org/viewvc/llvm-project?rev=205680&view=rev
Log:
MachineInstr: introduce explicit_operands and implicit_operands ranges
Makes iteration over implicit and explicit machine operands more
explicit (har har). Insipired by code review discussion for r205565.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineInstr.h
llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp
llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=205680&r1=205679&r2=205680&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Sat Apr 5 17:42:04 2014
@@ -293,6 +293,22 @@ public:
iterator_range<const_mop_iterator> operands() const {
return iterator_range<const_mop_iterator>(operands_begin(), operands_end());
}
+ iterator_range<mop_iterator> explicit_operands() {
+ return iterator_range<mop_iterator>(
+ operands_begin(), operands_begin() + getNumExplicitOperands());
+ }
+ iterator_range<const_mop_iterator> explicit_operands() const {
+ return iterator_range<const_mop_iterator>(
+ operands_begin(), operands_begin() + getNumExplicitOperands());
+ }
+ iterator_range<mop_iterator> implicit_operands() {
+ return iterator_range<mop_iterator>(explicit_operands().end(),
+ operands_end());
+ }
+ iterator_range<const_mop_iterator> implicit_operands() const {
+ return iterator_range<const_mop_iterator>(explicit_operands().end(),
+ operands_end());
+ }
/// Access to memory operands of the instruction
mmo_iterator memoperands_begin() const { return MemRefs; }
Modified: llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp?rev=205680&r1=205679&r2=205680&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp Sat Apr 5 17:42:04 2014
@@ -50,13 +50,10 @@ char ARM64DeadRegisterDefinitions::ID =
bool ARM64DeadRegisterDefinitions::implicitlyDefinesSubReg(
unsigned Reg,
const MachineInstr *MI) {
- for (unsigned i = MI->getNumExplicitOperands(), e = MI->getNumOperands();
- i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
+ for (const MachineOperand &MO : MI->implicit_operands())
if (MO.isReg() && MO.isDef())
if (TRI->isSubRegister(Reg, MO.getReg()))
return true;
- }
return false;
}
Modified: llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp?rev=205680&r1=205679&r2=205680&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp Sat Apr 5 17:42:04 2014
@@ -38,9 +38,7 @@ AMDGPUMCInstLower::AMDGPUMCInstLower(MCC
void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
OutMI.setOpcode(MI->getOpcode());
- for (unsigned i = 0, e = MI->getNumExplicitOperands(); i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
-
+ for (const MachineOperand &MO : MI->explicit_operands()) {
MCOperand MCOp;
switch (MO.getType()) {
default:
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