[PATCH] Fixed STRD register classes for Thumb2 mode.
Stepan Dyatkovskiy
stpworld at narod.ru
Fri Apr 4 01:12:19 PDT 2014
FileCheck...
Hi t.p.northover, rengolin,
http://llvm-reviews.chandlerc.com/D3287
CHANGE SINCE LAST DIFF
http://llvm-reviews.chandlerc.com/D3287?vs=8363&id=8364#toc
Files:
lib/Target/ARM/ARMInstrThumb2.td
test/MC/ARM/basic-thumb2-instructions.s
test/MC/ARM/thumb2-strd.s
Index: lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- lib/Target/ARM/ARMInstrThumb2.td
+++ lib/Target/ARM/ARMInstrThumb2.td
@@ -1445,7 +1445,7 @@
// Store doubleword
let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1 in
def t2STRDi8 : T2Ii8s4<1, 0, 0, (outs),
- (ins GPR:$Rt, GPR:$Rt2, t2addrmode_imm8s4:$addr),
+ (ins rGPR:$Rt, rGPR:$Rt2, t2addrmode_imm8s4:$addr),
IIC_iStore_d_r, "strd", "\t$Rt, $Rt2, $addr", "", []>;
// Indexed stores
Index: test/MC/ARM/basic-thumb2-instructions.s
===================================================================
--- test/MC/ARM/basic-thumb2-instructions.s
+++ test/MC/ARM/basic-thumb2-instructions.s
@@ -2805,6 +2805,9 @@
strd r0, r1, [r2, #-0]
strd r0, r1, [r2, #-0]!
strd r0, r1, [r2], #-0
+ strd r0, r1, [r2, #256]
+ strd r0, r1, [r2, #256]!
+ strd r0, r1, [r2], #256
@ CHECK: strd r3, r5, [r6, #24] @ encoding: [0xc6,0xe9,0x06,0x35]
@ CHECK: strd r3, r5, [r6, #24]! @ encoding: [0xe6,0xe9,0x06,0x35]
@@ -2815,6 +2818,9 @@
@ CHECK: strd r0, r1, [r2, #-0] @ encoding: [0x42,0xe9,0x00,0x01]
@ CHECK: strd r0, r1, [r2, #-0]! @ encoding: [0x62,0xe9,0x00,0x01]
@ CHECK: strd r0, r1, [r2], #-0 @ encoding: [0x62,0xe8,0x00,0x01]
+@ CHECK: strd r0, r1, [r2, #256] @ encoding: [0xc2,0xe9,0x40,0x01]
+@ CHECK: strd r0, r1, [r2, #256]! @ encoding: [0xe2,0xe9,0x40,0x01]
+@ CHECK: strd r0, r1, [r2], #256 @ encoding: [0xe2,0xe8,0x40,0x01]
@------------------------------------------------------------------------------
Index: test/MC/ARM/thumb2-strd.s
===================================================================
--- /dev/null
+++ test/MC/ARM/thumb2-strd.s
@@ -0,0 +1,10 @@
+@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s
+.text
+.thumb
+
+@ CHECK: error: invalid operand for instruction
+@ CHECK: error: invalid operand for instruction
+@ CHECK: error: invalid operand for instruction
+strd r12, SP, [r0, #256]
+strd r12, SP, [r0, #256]!
+strd r12, SP, [r0], #256
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