[llvm] r205452 - ARM: cortex-m0 doesn't support unaligned memory access.

Jim Grosbach grosbach at apple.com
Wed Apr 2 12:28:13 PDT 2014


Author: grosbach
Date: Wed Apr  2 14:28:13 2014
New Revision: 205452

URL: http://llvm.org/viewvc/llvm-project?rev=205452&view=rev
Log:
ARM: cortex-m0 doesn't support unaligned memory access.

Unlike other v6+ processors, cortex-m0 never supports unaligned accesses.
>From the v6m ARM ARM:

"A3.2 Alignment support: ARMv6-M always generates a fault when an unaligned
access occurs."

rdar://16491560

Added:
    llvm/trunk/test/CodeGen/Thumb/cortex-m0-unaligned-access.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=205452&r1=205451&r2=205452&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Wed Apr  2 14:28:13 2014
@@ -236,7 +236,7 @@ void ARMSubtarget::resetSubtargetFeature
       //
       // ARMv6 may or may not support unaligned accesses depending on the
       // SCTLR.U bit, which is architecture-specific. We assume ARMv6
-      // Darwin targets support unaligned accesses, and others don't.
+      // Darwin and NetBSD targets support unaligned accesses, and others don't.
       //
       // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
       // which raises an alignment fault on unaligned accesses. Linux
@@ -249,6 +249,11 @@ void ARMSubtarget::resetSubtargetFeature
           (hasV7Ops() && (isTargetLinux() || isTargetNaCl() ||
                           isTargetNetBSD())) ||
           (hasV6Ops() && (isTargetMachO() || isTargetNetBSD()));
+      // The one exception is cortex-m0, which despite being v6, does not
+      // support unaligned accesses. Rather than make the above boolean
+      // expression even more obtuse, just override the value here.
+      if (isThumb1Only() && isMClass())
+        AllowsUnalignedMem = false;
       break;
     case StrictAlign:
       AllowsUnalignedMem = false;

Added: llvm/trunk/test/CodeGen/Thumb/cortex-m0-unaligned-access.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/cortex-m0-unaligned-access.ll?rev=205452&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/cortex-m0-unaligned-access.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb/cortex-m0-unaligned-access.ll Wed Apr  2 14:28:13 2014
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple=thumbv6m-apple-unknown-macho < %s | FileCheck --check-prefix=V6M %s
+; RUN: llc -mtriple=thumbv7m-apple-unknown-macho < %s | FileCheck --check-prefix=V7M %s
+
+define i32 @split_load(i32* %p) nounwind {
+; V6M-LABEL: split_load
+; V6M: ldrh
+; V6M: ldrh
+; V7M-LABEL: split_load
+; V7M-NOT: ldrh
+; V7M: bx lr
+  %val = load i32* %p, align 2
+  ret i32 %val
+}





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