[PATCH] R600/SI: Implement shouldConvertConstantLoadToIntImm
Matt Arsenault
Matthew.Arsenault at amd.com
Mon Mar 17 10:26:14 PDT 2014
http://llvm-reviews.chandlerc.com/D3101
Files:
lib/Target/R600/SIISelLowering.cpp
lib/Target/R600/SIISelLowering.h
lib/Target/R600/SIInstrInfo.cpp
lib/Target/R600/SIInstrInfo.h
Index: lib/Target/R600/SIISelLowering.cpp
===================================================================
--- lib/Target/R600/SIISelLowering.cpp
+++ lib/Target/R600/SIISelLowering.cpp
@@ -215,6 +215,13 @@
return VT.bitsLE(MVT::i16);
}
+bool SITargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
+ Type *Ty) const {
+ const SIInstrInfo *TII =
+ static_cast<const SIInstrInfo*>(getTargetMachine().getInstrInfo());
+ return TII->isInlineConstant(Imm);
+}
+
SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
SDLoc DL, SDValue Chain,
unsigned Offset) const {
Index: lib/Target/R600/SIISelLowering.h
===================================================================
--- lib/Target/R600/SIISelLowering.h
+++ lib/Target/R600/SIISelLowering.h
@@ -52,6 +52,9 @@
bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS, bool *IsFast) const;
virtual bool shouldSplitVectorElementType(EVT VT) const;
+ virtual bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
+ Type *Ty) const override;
+
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
Index: lib/Target/R600/SIInstrInfo.cpp
===================================================================
--- lib/Target/R600/SIInstrInfo.cpp
+++ lib/Target/R600/SIInstrInfo.cpp
@@ -348,20 +348,10 @@
return get(MI.getOpcode()).TSFlags & SIInstrFlags::SALU;
}
-bool SIInstrInfo::isInlineConstant(const MachineOperand &MO) const {
-
- union {
- int32_t I;
- float F;
- } Imm;
-
- if (MO.isImm()) {
- Imm.I = MO.getImm();
- } else if (MO.isFPImm()) {
- Imm.F = MO.getFPImm()->getValueAPF().convertToFloat();
- } else {
- return false;
- }
+bool SIInstrInfo::isInlineConstant(const APInt &Imm) const {
+ int32_t Val = Imm.getSExtValue();
+ if (Val >= -16 && Val <= 64)
+ return true;
// The actual type of the operand does not seem to matter as long
// as the bits match one of the inline immediate values. For example:
@@ -371,10 +361,28 @@
//
// 1065353216 has the hexadecimal encoding 0x3f800000 which is 1.0f in
// floating-point, so it is a legal inline immediate.
- return (Imm.I >= -16 && Imm.I <= 64) ||
- Imm.F == 0.0f || Imm.F == 0.5f || Imm.F == -0.5f || Imm.F == 1.0f ||
- Imm.F == -1.0f || Imm.F == 2.0f || Imm.F == -2.0f || Imm.F == 4.0f ||
- Imm.F == -4.0f;
+
+ return (APInt::floatToBits(0.0f) == Imm) ||
+ (APInt::floatToBits(1.0f) == Imm) ||
+ (APInt::floatToBits(-1.0f) == Imm) ||
+ (APInt::floatToBits(0.5f) == Imm) ||
+ (APInt::floatToBits(-0.5f) == Imm) ||
+ (APInt::floatToBits(2.0f) == Imm) ||
+ (APInt::floatToBits(-2.0f) == Imm) ||
+ (APInt::floatToBits(4.0f) == Imm) ||
+ (APInt::floatToBits(-4.0f) == Imm);
+}
+
+bool SIInstrInfo::isInlineConstant(const MachineOperand &MO) const {
+ if (MO.isImm())
+ return isInlineConstant(APInt(32, MO.getImm(), true));
+
+ if (MO.isFPImm()) {
+ APFloat FpImm = MO.getFPImm()->getValueAPF();
+ return isInlineConstant(FpImm.bitcastToAPInt());
+ }
+
+ return false;
}
bool SIInstrInfo::isLiteralConstant(const MachineOperand &MO) const {
Index: lib/Target/R600/SIInstrInfo.h
===================================================================
--- lib/Target/R600/SIInstrInfo.h
+++ lib/Target/R600/SIInstrInfo.h
@@ -77,6 +77,7 @@
bool isVOP2(uint16_t Opcode) const;
bool isVOP3(uint16_t Opcode) const;
bool isVOPC(uint16_t Opcode) const;
+ bool isInlineConstant(const APInt &Imm) const;
bool isInlineConstant(const MachineOperand &MO) const;
bool isLiteralConstant(const MachineOperand &MO) const;
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