[PATCH] Loop Vectorizer doesn't use %zmm registers on targets supporting AVX512.

[Andrea Di Biagio]

  Hi zinovy,

  Could you please add a test for it?

  You should be able to generate a test starting from your original example and building it with -emit-llvm. The resulting IR can then be used/adapted to create an 'opt' test that verifies that the body of the loop is correctly vectorized.
  The idea is that your new opt test would RUN opt with flags '-mattr=+avx512f' (or -mcpu=knl) and '-loop-vectorize'.

  You should be able to check that, with your change, the body of the vectorized loop now only contains fmul <16 x float> instructions. Before your change, it was producing instead a sequence of fmul <8 x float>.

  I hope this make sense :-)

  Andrea.

http://llvm-reviews.chandlerc.com/D3078