[PATCH] R600/SI: Add support for 64-bit LDS loads and stores

[Matt Arsenault]

On 03/12/2014 12:29 PM, Tom Stellard wrote:
> On Wed, Mar 12, 2014 at 11:24:49AM -0700, Matt Arsenault wrote:
>> Hi,
>>
>> This set of patches adds the 64-bit LDS load and store instruction, and matches the i16 constant offset available for addressing.
>>
> These look good, thanks for doing this.  I just have one comment on
> patch 4.  I will also need to test the patches before they can be committed.
>
> Patch 1: LGTM
>
>
>>  From 39dfdfd220eb5b8c5b6aa4d559ba8ab27aa5009c Mon Sep 17 00:00:00 2001
>> From: Matt Arsenault <Matthew.Arsenault at amd.com>
>> Date: Tue, 11 Mar 2014 20:15:47 -0700
>> Subject: [PATCH 2/7] R600/SI: Don't display the GDS bit.
>>
>> It isn't actually used now, and probably never will be, plus it makes
>> tests less annoying. I also think SC prints GDS instructions as a
>> separate instruction name.
> My idea for this was to print 'L' if it was cleared and 'G' if it
> was set and print it right before the instruction name, which would give you
> LDS_READ_B32 and
> GDS_READ_B32
>
> However, this is not critical and could be a follow on patch.  I am OK
> with not printing this field.
>

What the shader compiler does is put the string gds after the instruction:

   ds_read_b32   v0, v0 gds                                  // 
00000040: D8DA0000 00000000


>   
> +// Transformation function, extract the lower 8 bits of a 16-bit
> +// immediate.
> +def LO8_16 : SDNodeXForm<imm, [{
> +  APInt V = N->getAPIntValue().trunc(8);
> +  return CurDAG->getTargetConstant(V, MVT::i8);
> +}]>;
> +
> +// Transformation function, extract the upper 8 bits of a 16-bit
> +// immediate.
> +def HI8_16 : SDNodeXForm<imm, [{
> +  APInt V = N->getAPIntValue().trunc(16).shr(8);
> +  return CurDAG->getTargetConstant(V, MVT::i8);
> +}]>;
> +
>   // Transformation function, extract the lower 32bit of a 64bit immediate
>   def LO32 : SDNodeXForm<imm, [{
>     return CurDAG->getTargetConstant(N->getZExtValue() & 0xffffffff, MVT::i32);
> @@ -95,14 +109,32 @@ def as_i16imm : SDNodeXForm<imm, [{
>     return CurDAG->getTargetConstant(N->getSExtValue(), MVT::i16);
>   }]>;
>   
> +def as_i8imm_low16 : SDNodeXForm<imm, [{
> +  return CurDAG->getTargetConstant(N->getSExtValue() & 0x00ff,
> +                                   MVT::i16);
> +}]>;
> +
> +def as_i8imm_high16 : SDNodeXForm<imm, [{
> +  return CurDAG->getTargetConstant(N->getSExtValue() & 0xff00,
> +                                   MVT::i16);
> +}]>;
> +
>   def as_i32imm: SDNodeXForm<imm, [{
>     return CurDAG->getTargetConstant(N->getSExtValue(), MVT::i32);
>   }]>;
>   
> +def IMM8bit : PatLeaf <(imm),
> +  [{return isUInt<8>(N->getZExtValue());}]
> +>;
> +
>   def IMM12bit : PatLeaf <(imm),
>     [{return isUInt<12>(N->getZExtValue());}]
>   >;
>
> It looks like most of these new patterns aren't used anywhere.
>   
Those are leftovers when I was trying to figure out how to handle the 
different interpretation of the literal offsets. I'll remove them before 
committing.